On 04/23, Jiancheng Xue wrote:
> +
> +static int hi3519_clk_probe(struct platform_device *pdev)
> +{
> + struct device_node *np = pdev->dev.of_node;
> + struct hisi_clock_data *clk_data;
> + struct hisi_reset_controller *rstc;
> +
> + rstc = hisi_reset_init(np);
> + if (!rstc)
>
The CRG(Clock and Reset Generator) block provides clock
and reset signals for other modules in hi3519 soc.
Signed-off-by: Jiancheng Xue
Acked-by: Rob Herring
---
.../devicetree/bindings/clock/hi3519-crg.txt | 46
drivers/clk/hisilicon/Kconfig | 8 ++
drive
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