The TRM shows a CLK_SOURCE_ISPB register, but after some discussion, it
seems like that is a documentation generation bug, so this should be
correct.
Reviewed-by: Mikko Perttunen
On 22.02.2017 17:13, Peter De Schrijver wrote:
The 2 isp clocks (ispa and ispb) share a mux/divider control. So m
The 2 isp clocks (ispa and ispb) share a mux/divider control. So model
this as 1 mux/divider clock and child gate clocks.
Signed-off-by: Peter De Schrijver
---
drivers/clk/tegra/clk-id.h | 1 +
drivers/clk/tegra/clk-tegra-periph.c | 11 +--
drivers/clk/tegra/clk-tegra2
2 matches
Mail list logo
