On Mon, Jan 21, 2013 at 11:09:07PM +0100, Linus Walleij wrote:
> On Fri, Jan 18, 2013 at 10:30 PM, Maxime Ripard
> wrote:
> > The Allwinner SoCs have an IP module that handle both the muxing and the
> > GPIOs.
> >
> > This IP has 8 banks of 32 bits, with a number of pins actually useful
> > for ea
On Friday 18 January 2013, Maxime Ripard wrote:
> The Allwinner SoCs have an IP module that handle both the muxing and the
> GPIOs.
>
> This IP has 8 banks of 32 bits, with a number of pins actually useful
> for each of these banks varying from one to another, and depending on
> the SoC used on th
On Fri, Jan 18, 2013 at 10:30 PM, Maxime Ripard
wrote:
> The Allwinner SoCs have an IP module that handle both the muxing and the
> GPIOs.
>
> This IP has 8 banks of 32 bits, with a number of pins actually useful
> for each of these banks varying from one to another, and depending on
> the SoC use
The Allwinner SoCs have an IP module that handle both the muxing and the
GPIOs.
This IP has 8 banks of 32 bits, with a number of pins actually useful
for each of these banks varying from one to another, and depending on
the SoC used on the board.
This driver only implements the pinctrl part, the
On Tue, Jan 8, 2013 at 10:43 PM, Maxime Ripard
wrote:
> +config PINCTRL_SUNXI
> + bool
> + select PINMUX
> + select GENERIC_PINCONF
Very nice that you use generic pinconf!
> +++ b/drivers/pinctrl/pinctrl-sunxi.c
(...)
> + switch (pinconf_to_config_param(config)) {
> +
The Allwinner SoCs have an IP module that handle both the muxing and the
GPIOs.
This IP has 8 banks of 32 bits, with a number of pins actually useful
for each of these banks varying from one to another, and depending on
the SoC used on the board.
This driver only implements the pinctrl part, the
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