Re: [PATCH 2/5] mm/device-public-memory: device memory cache coherent with CPU v2

2017-07-11 Thread Balbir Singh
On Tue, 11 Jul 2017 10:57:44 -0400 Jerome Glisse wrote: > On Tue, Jul 11, 2017 at 02:12:15PM +1000, Balbir Singh wrote: > > On Mon, 3 Jul 2017 17:14:12 -0400 > > Jérôme Glisse wrote: > > > > > Platform with advance system bus (like CAPI or CCIX) allow device > > > memory to be accessible fro

Re: [PATCH 2/5] mm/device-public-memory: device memory cache coherent with CPU v2

2017-07-11 Thread Jerome Glisse
On Tue, Jul 11, 2017 at 02:12:15PM +1000, Balbir Singh wrote: > On Mon, 3 Jul 2017 17:14:12 -0400 > Jérôme Glisse wrote: > > > Platform with advance system bus (like CAPI or CCIX) allow device > > memory to be accessible from CPU in a cache coherent fashion. Add > > a new type of ZONE_DEVICE to

Re: [PATCH 2/5] mm/device-public-memory: device memory cache coherent with CPU v2

2017-07-10 Thread Balbir Singh
On Mon, 3 Jul 2017 17:14:12 -0400 Jérôme Glisse wrote: > Platform with advance system bus (like CAPI or CCIX) allow device > memory to be accessible from CPU in a cache coherent fashion. Add > a new type of ZONE_DEVICE to represent such memory. The use case > are the same as for the un-addressab

[PATCH 2/5] mm/device-public-memory: device memory cache coherent with CPU v2

2017-07-03 Thread Jérôme Glisse
Platform with advance system bus (like CAPI or CCIX) allow device memory to be accessible from CPU in a cache coherent fashion. Add a new type of ZONE_DEVICE to represent such memory. The use case are the same as for the un-addressable device memory but without all the corners cases. Changed since