Re: [PATCH 2/2] pwm: tegra: Set maximum pwm clock source per SoC tapeout

2017-04-13 Thread Laxman Dewangan
On Thursday 13 April 2017 08:57 PM, Thierry Reding wrote: * PGP Signed by an unknown key On Thu, Apr 13, 2017 at 07:40:28PM +0530, Laxman Dewangan wrote: The PWM hardware IP is taped-out with different maximum frequency on different SoCs. From HW team: For Tegra210, it is 38.4MHz.

Re: [PATCH 2/2] pwm: tegra: Set maximum pwm clock source per SoC tapeout

2017-04-13 Thread Thierry Reding
On Thu, Apr 13, 2017 at 07:40:28PM +0530, Laxman Dewangan wrote: > The PWM hardware IP is taped-out with different maximum frequency > on different SoCs. > > From HW team: > For Tegra210, it is 38.4MHz. > For Tegra186, it is 102MHz. > > Add support to limit the clock source frequency

[PATCH 2/2] pwm: tegra: Set maximum pwm clock source per SoC tapeout

2017-04-13 Thread Laxman Dewangan
The PWM hardware IP is taped-out with different maximum frequency on different SoCs. >From HW team: For Tegra210, it is 38.4MHz. For Tegra186, it is 102MHz. Add support to limit the clock source frequency to the maximum IP supported frequency. Provide these values via SoC chipdata