On 2018/12/3 18:06, Neil Armstrong wrote:
On 03/12/2018 10:28, Xingyu Chen wrote:
On 2018/12/3 17:19, Jerome Brunet wrote:
On Mon, 2018-12-03 at 14:13 +0800, Xingyu Chen wrote:
The Meson-G12A SoC uses the same GPIO interrupt controller IP block as the
other Meson SoCs, A totle of 100 pins
On 03/12/2018 10:28, Xingyu Chen wrote:
>
>
> On 2018/12/3 17:19, Jerome Brunet wrote:
>> On Mon, 2018-12-03 at 14:13 +0800, Xingyu Chen wrote:
>>> The Meson-G12A SoC uses the same GPIO interrupt controller IP block as the
>>> other Meson SoCs, A totle of 100 pins can be spied on, which is the su
On 2018/12/3 17:19, Jerome Brunet wrote:
On Mon, 2018-12-03 at 14:13 +0800, Xingyu Chen wrote:
The Meson-G12A SoC uses the same GPIO interrupt controller IP block as the
other Meson SoCs, A totle of 100 pins can be spied on, which is the sum of:
- 223:100 undefined (no interrupt)
- 99:97 3
On Mon, 2018-12-03 at 14:13 +0800, Xingyu Chen wrote:
> The Meson-G12A SoC uses the same GPIO interrupt controller IP block as the
> other Meson SoCs, A totle of 100 pins can be spied on, which is the sum of:
>
> - 223:100 undefined (no interrupt)
> - 99:97 3 pins on bank GPIOE
> - 96:77 20 pi
The Meson-G12A SoC uses the same GPIO interrupt controller IP block as the
other Meson SoCs, A totle of 100 pins can be spied on, which is the sum of:
- 223:100 undefined (no interrupt)
- 99:97 3 pins on bank GPIOE
- 96:77 20 pins on bank GPIOX
- 76:61 16 pins on bank GPIOA
- 60:53 8 pins
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