On Mon, May 13, 2019 at 5:15 AM Fabio Estevam wrote:
>
> Hi Andrey,
>
> On Mon, May 13, 2019 at 12:59 AM Andrey Smirnov
> wrote:
>
> > +&qspi0 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_qspi0>;
> > + status = "okay";
> > +
> > + /*
> > +* Attach
Hi Andrey,
On Mon, May 13, 2019 at 12:59 AM Andrey Smirnov
wrote:
> +&qspi0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_qspi0>;
> + status = "okay";
> +
> + /*
> +* Attached MT25QL02 can go up to 90Mhz in DTR and 166 in SDR
> +* modes, so we
Both rev C and rev B of the board come with two QSPI-NOR chips
attached to the SoC. Add DT code describing all of this.
Signed-off-by: Andrey Smirnov
Cc: Shawn Guo
Cc: Chris Healy
Cc: Andrew Lunn
Cc: Fabio Estevam
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
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