Re: [PATCH 1/9] KVM: MMU: fix decoding cache type from MTRR

2015-05-06 Thread Xiao Guangrong
On 05/07/2015 05:42 AM, David Matlack wrote: On Thu, Apr 30, 2015 at 3:24 AM, wrote: From: Xiao Guangrong There are some bugs in current get_mtrr_type(); 1: bit 2 of mtrr_state->enabled is corresponding bit 11 of IA32_MTRR_DEF_TYPE bit 1, not bit 2. (code is correct though) Oh, i count

Re: [PATCH 1/9] KVM: MMU: fix decoding cache type from MTRR

2015-05-06 Thread David Matlack
On Thu, Apr 30, 2015 at 3:24 AM, wrote: > From: Xiao Guangrong > > There are some bugs in current get_mtrr_type(); > 1: bit 2 of mtrr_state->enabled is corresponding bit 11 of IA32_MTRR_DEF_TYPE bit 1, not bit 2. (code is correct though) >MSR which completely control MTRR's enablement that

[PATCH 1/9] KVM: MMU: fix decoding cache type from MTRR

2015-04-30 Thread guangrong . xiao
From: Xiao Guangrong There are some bugs in current get_mtrr_type(); 1: bit 2 of mtrr_state->enabled is corresponding bit 11 of IA32_MTRR_DEF_TYPE MSR which completely control MTRR's enablement that means other bits are ignored if it is cleared 2: the fixed MTRR ranges are controlled by bi

[PATCH 1/9] KVM: MMU: fix decoding cache type from MTRR

2015-04-30 Thread guangrong . xiao
From: Xiao Guangrong There are some bugs in current get_mtrr_type(); 1: bit 2 of mtrr_state->enabled is corresponding bit 11 of IA32_MTRR_DEF_TYPE MSR which completely control MTRR's enablement that means other bits are ignored if it is cleared 2: the fixed MTRR ranges are controlled by bi