On Mon, Apr 22, 2013 at 04:37:15PM -0500, Jacob Shin wrote:
> On Sun, Apr 21, 2013 at 07:02:02PM +0200, Oleg Nesterov wrote:
> > On 04/20, Jacob Shin wrote:
> > >
> > > On Sat, Apr 20, 2013 at 06:53:34PM +0200, Oleg Nesterov wrote:
> > > >
> > > > And does attr.bp_len "contribute" to the mask?
> >
On Sun, Apr 21, 2013 at 07:02:02PM +0200, Oleg Nesterov wrote:
> On 04/20, Jacob Shin wrote:
> >
> > On Sat, Apr 20, 2013 at 06:53:34PM +0200, Oleg Nesterov wrote:
> > >
> > > And does attr.bp_len "contribute" to the mask?
> > >
> > > I mean, if bp_len == X86_BREAKPOINT_LEN_8, does this mean that
>
On 04/20, Jacob Shin wrote:
>
> On Sat, Apr 20, 2013 at 06:53:34PM +0200, Oleg Nesterov wrote:
> >
> > And does attr.bp_len "contribute" to the mask?
> >
> > I mean, if bp_len == X86_BREAKPOINT_LEN_8, does this mean that
> > bp_bp_addr_mask and (bp_bp_addr_mask | 7) have the same effect?
>
> Yes it
On 04/20, Jacob Shin wrote:
>
> On Sat, Apr 20, 2013 at 06:22:23PM +0200, Oleg Nesterov wrote:
> > On 04/09, Jacob Shin wrote:
> > >
> > > @@ -612,6 +612,9 @@ static int hw_breakpoint_add(struct perf_event *bp,
> > > int flags)
> > > if (!(flags & PERF_EF_START))
> > > bp->hw.state = P
On Sat, Apr 20, 2013 at 06:53:34PM +0200, Oleg Nesterov wrote:
> On 04/09, Jacob Shin wrote:
> >
> > The following patchset adds address masks to existing perf hardware
> > breakpoint mechanism to allow trapping on an address range (currently
> > only single address) on supported architectures.
> >
On Sat, Apr 20, 2013 at 06:22:23PM +0200, Oleg Nesterov wrote:
> On 04/09, Jacob Shin wrote:
> >
> > @@ -612,6 +612,9 @@ static int hw_breakpoint_add(struct perf_event *bp, int
> > flags)
> > if (!(flags & PERF_EF_START))
> > bp->hw.state = PERF_HES_STOPPED;
> >
> > + if (bp->att
On 04/09, Jacob Shin wrote:
>
> @@ -612,6 +612,9 @@ static int hw_breakpoint_add(struct perf_event *bp, int
> flags)
> if (!(flags & PERF_EF_START))
> bp->hw.state = PERF_HES_STOPPED;
>
> + if (bp->attr.bp_addr_mask && !arch_has_hw_breakpoint_addr_mask())
> + re
Some architectures (for us, AMD Family 16h) allow for "don't care" bit
mask to further qualify a hardware breakpoint address, in order to
trap on range of addresses. Update perf uapi to add bp_addr_mask field
and define HAVE_HW_BREAKPOINT_ADDR_MASK.
Signed-off-by: Jacob Shin
---
arch/Kconfig
Some architectures (for us, AMD Family 16h) allow for "don't care" bit
mask to further qualify a hardware breakpoint address, in order to
trap on range of addresses. Update perf uapi to add bp_addr_mask field
and define HAVE_HW_BREAKPOINT_ADDR_MASK.
Signed-off-by: Jacob Shin
---
arch/Kconfig
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