Hi Geert,
On Wed, Aug 26, 2015 at 4:29 PM, Geert Uytterhoeven
wrote:
> Hi Stephen,
>
> On Wed, Aug 26, 2015 at 12:46 AM, Stephen Boyd wrote:
>>> --- /dev/null
>>> +++ b/drivers/clk/shmobile/clk-rcar-gen3.c
>
>>> +
>>> +/*
>>> + * Reset register definitions.
>>> + */
>>> +#define MODEMR 0xe616006
Hi Stephen,
On Wed, Aug 26, 2015 at 12:46 AM, Stephen Boyd wrote:
>> --- /dev/null
>> +++ b/drivers/clk/shmobile/clk-rcar-gen3.c
>> +
>> +/*
>> + * Reset register definitions.
>> + */
>> +#define MODEMR 0xe6160060
>> +
>> +static u32 rcar_gen3_read_mode_pins(void)
>> +{
>> + static u32 mode;
On 08/25, Kuninori Morimoto wrote:
> diff --git a/drivers/clk/shmobile/clk-rcar-gen3.c
> b/drivers/clk/shmobile/clk-rcar-gen3.c
> new file mode 100644
> index 000..098caac
> --- /dev/null
> +++ b/drivers/clk/shmobile/clk-rcar-gen3.c
> @@ -0,0 +1,232 @@
> +/*
> + * rcar_gen3 Core CPG Clocks
> +
From: Gaku Inami
This patch adds very initial CPG support.
R-Car Gen3 write function should use CPG write protection method
which is shared with MSTP driver. This patch has it but not used.
Signed-off-by: Gaku Inami
Signed-off-by: Kuninori Morimoto
---
.../clock/renesas,rcar-gen3-cpg-clocks.t
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