Re: [PATCH 09/17] clocksource/timer-riscv: New RISC-V Clocksource

2017-06-26 Thread Palmer Dabbelt
On Wed, 07 Jun 2017 13:16:59 PDT (-0700), daniel.lezc...@linaro.org wrote: > Hi, > > I prefer the term 'timer' when we have a clocksource + clockevent. > > Reply-To: > In-Reply-To: > > > On Wed, Jun 07, 2017 at 09:12:28AM +0200, Geert Uytterhoeven wrote: >> CC clocksource folks > > Thanks Geert.

Re: [PATCH 09/17] clocksource/timer-riscv: New RISC-V Clocksource

2017-06-23 Thread Palmer Dabbelt
On Wed, 07 Jun 2017 02:43:09 PDT (-0700), marc.zyng...@arm.com wrote: > On 06/06/17 23:59, Palmer Dabbelt wrote: >> The RISC-V ISA defines a single RTC as well as an SBI oneshot timer. >> This timer is present on all RISC-V systems. >> >> Signed-off-by: Palmer Dabbelt >> --- >> drivers/clocksourc

Re: [PATCH 09/17] clocksource/timer-riscv: New RISC-V Clocksource

2017-06-23 Thread Palmer Dabbelt
On Wed, 07 Jun 2017 00:25:37 PDT (-0700), Arnd Bergmann wrote: > On Wed, Jun 7, 2017 at 9:12 AM, Geert Uytterhoeven > wrote: >> CC clocksource folks >> >> On Wed, Jun 7, 2017 at 12:59 AM, Palmer Dabbelt wrote: >>> The RISC-V ISA defines a single RTC as well as an SBI oneshot timer. >>> This time

Re: [PATCH 09/17] clocksource/timer-riscv: New RISC-V Clocksource

2017-06-07 Thread Daniel Lezcano
Hi, I prefer the term 'timer' when we have a clocksource + clockevent. Reply-To: In-Reply-To: On Wed, Jun 07, 2017 at 09:12:28AM +0200, Geert Uytterhoeven wrote: > CC clocksource folks Thanks Geert. > On Wed, Jun 7, 2017 at 12:59 AM, Palmer Dabbelt wrote: > > The RISC-V ISA defines a sing

Re: [PATCH 09/17] clocksource/timer-riscv: New RISC-V Clocksource

2017-06-07 Thread Marc Zyngier
On 06/06/17 23:59, Palmer Dabbelt wrote: > The RISC-V ISA defines a single RTC as well as an SBI oneshot timer. > This timer is present on all RISC-V systems. > > Signed-off-by: Palmer Dabbelt > --- > drivers/clocksource/Kconfig | 8 +++ > drivers/clocksource/Makefile | 1 + > dri

Re: [PATCH 09/17] clocksource/timer-riscv: New RISC-V Clocksource

2017-06-07 Thread Arnd Bergmann
On Wed, Jun 7, 2017 at 9:12 AM, Geert Uytterhoeven wrote: > CC clocksource folks > > On Wed, Jun 7, 2017 at 12:59 AM, Palmer Dabbelt wrote: >> The RISC-V ISA defines a single RTC as well as an SBI oneshot timer. >> This timer is present on all RISC-V systems. >> >> Signed-off-by: Palmer Dabbelt

Re: [PATCH 09/17] clocksource/timer-riscv: New RISC-V Clocksource

2017-06-07 Thread Geert Uytterhoeven
CC clocksource folks On Wed, Jun 7, 2017 at 12:59 AM, Palmer Dabbelt wrote: > The RISC-V ISA defines a single RTC as well as an SBI oneshot timer. > This timer is present on all RISC-V systems. > > Signed-off-by: Palmer Dabbelt > --- > drivers/clocksource/Kconfig | 8 +++ > drivers/cloc

[PATCH 09/17] clocksource/timer-riscv: New RISC-V Clocksource

2017-06-06 Thread Palmer Dabbelt
The RISC-V ISA defines a single RTC as well as an SBI oneshot timer. This timer is present on all RISC-V systems. Signed-off-by: Palmer Dabbelt --- drivers/clocksource/Kconfig | 8 +++ drivers/clocksource/Makefile | 1 + drivers/clocksource/timer-riscv.c | 118