Adds support for IA32_PQR_ASSOC MSR writes during task scheduling. For
Cache Allocation, MSR write would let the task fill in the cache
'subset' represented by the cgroup's cache_mask.
The high 32 bits in the per processor MSR IA32_PQR_ASSOC represents the
CLOSid. During context switch kernel imp
Adds support for IA32_PQR_ASSOC MSR writes during task scheduling. For
Cache Allocation, MSR write would let the task fill in the cache
'subset' represented by the cgroup's cache_mask.
The high 32 bits in the per processor MSR IA32_PQR_ASSOC represents the
CLOSid. During context switch kernel imp
Adds support for IA32_PQR_ASSOC MSR writes during task scheduling. For
Cache Allocation, MSR write would let the task fill in the cache
'subset' represented by the cgroup's cache_mask.
The high 32 bits in the per processor MSR IA32_PQR_ASSOC represents the
CLOSid. During context switch kernel imp
On Sat, 6 Jun 2015, Thomas Gleixner wrote:
On Thu, 4 Jun 2015, Vikas Shivappa wrote:
+static inline void intel_rdt_sched_in(void)
+{
+ if (static_key_false(&rdt_enable_key))
+ __intel_rdt_sched_in();
So if the enable_key is FALSE we call the RDT stuff? I might be
missing
On Mon, 8 Jun 2015, Thomas Gleixner wrote:
On Sat, 6 Jun 2015, Thomas Gleixner wrote:
On Thu, 4 Jun 2015, Vikas Shivappa wrote:
+static inline void intel_rdt_sched_in(void)
+{
+ if (static_key_false(&rdt_enable_key))
+ __intel_rdt_sched_in();
So if the enable_key is FA
On Sat, 6 Jun 2015, Thomas Gleixner wrote:
> On Thu, 4 Jun 2015, Vikas Shivappa wrote:
> > +static inline void intel_rdt_sched_in(void)
> > +{
> > + if (static_key_false(&rdt_enable_key))
> > + __intel_rdt_sched_in();
>
> So if the enable_key is FALSE we call the RDT stuff? I might be
On Thu, 4 Jun 2015, Vikas Shivappa wrote:
> +static inline void intel_rdt_sched_in(void)
> +{
> + if (static_key_false(&rdt_enable_key))
> + __intel_rdt_sched_in();
So if the enable_key is FALSE we call the RDT stuff? I might be
missing something important, but this does not make a
Adds support for IA32_PQR_ASSOC MSR writes during task scheduling. For
Cache Allocation, MSR write would let the task fill in the cache
'subset' represented by the cgroup's cache_mask.
The high 32 bits in the per processor MSR IA32_PQR_ASSOC represents the
CLOSid. During context switch kernel imp
Adds support for IA32_PQR_ASSOC MSR writes during task scheduling. For
Cache Allocation, MSR write would let the task fill in the cache
'subset' represented by the cgroup's cache_mask.
The high 32 bits in the per processor MSR IA32_PQR_ASSOC represents the
CLOSid. During context switch kernel imp
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