Some IRQ chips, such as GPIO controllers or secondary level interrupt
controllers, may require require additional runtime power management
control to ensure they are accessible. For such IRQ chips, it makes sense
to enable the IRQ chip when interrupts are requested and disabled them
again once all
On 17/03/16 14:55, Thomas Gleixner wrote:
> On Thu, 17 Mar 2016, Jon Hunter wrote:
>> --- a/kernel/irq/manage.c
>> +++ b/kernel/irq/manage.c
>> @@ -1117,6 +1117,13 @@ __setup_irq(unsigned int irq, struct irq_desc *desc,
>> struct irqaction *new)
>> new->irq = irq;
>>
>> /*
>> + *
On Thu, 17 Mar 2016, Jon Hunter wrote:
> --- a/kernel/irq/manage.c
> +++ b/kernel/irq/manage.c
> @@ -1117,6 +1117,13 @@ __setup_irq(unsigned int irq, struct irq_desc *desc,
> struct irqaction *new)
> new->irq = irq;
>
> /*
> + * If the trigger type is not specified by the caller
On 17/03/16 14:19, Jon Hunter wrote:
> Some IRQ chips, such as GPIO controllers or secondary level interrupt
> controllers, may require require additional runtime power management
> control to ensure they are accessible. For such IRQ chips, it makes sense
> to enable the IRQ chip when interrupts a
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