Re: [PATCH 03/10] x86, perf: Add Top Down events to Intel Core

2016-05-12 Thread Ingo Molnar
* Andi Kleen wrote: > Subject: Re: [PATCH 03/10] x86, perf: Add Top Down events to Intel Core > arch/x86/events/intel/core.c | 50 > You consistently mis-spell patches to the x86 perf code and for large series this adds unnecessary m

Re: [PATCH 03/10] x86, perf: Add Top Down events to Intel Core

2016-05-11 Thread Peter Zijlstra
On Wed, May 11, 2016 at 03:23:36PM +0200, Jiri Olsa wrote: > On Thu, May 05, 2016 at 04:04:00PM -0700, Andi Kleen wrote: > > SNIP > > > + > > +EVENT_ATTR_STR_HT(topdown-total-slots, td_total_slots, > > + "event=0x3c,umask=0x0", /* cpu_clk_unhalted.thread */ > > + "event=0x3c,u

Re: [PATCH 03/10] x86, perf: Add Top Down events to Intel Core

2016-05-11 Thread Jiri Olsa
On Thu, May 05, 2016 at 04:04:00PM -0700, Andi Kleen wrote: SNIP > + > +EVENT_ATTR_STR_HT(topdown-total-slots, td_total_slots, > + "event=0x3c,umask=0x0", /* cpu_clk_unhalted.thread */ > + "event=0x3c,umask=0x0,any=1"); /* cpu_clk_unhalted.thread_any > */ > +EVEN

[PATCH 03/10] x86, perf: Add Top Down events to Intel Core

2016-05-05 Thread Andi Kleen
From: Andi Kleen Add declarations for the events needed for TopDown to the Intel big core CPUs starting with Sandy Bridge. We need to report different values if HyperThreading is on or off. The only thing this patch does is to export some events in sysfs. TopDown level 1 uses a set of abstracte