On Wed, Jul 26, 2017 at 05:29:11PM -0500, Alan Tull wrote:
> On Wed, Jul 26, 2017 at 9:20 AM, Alan Tull wrote:
> > On Wed, Jul 26, 2017 at 4:50 AM, Wu Hao wrote:
> >> On Tue, Jul 25, 2017 at 04:32:10PM -0500, Alan Tull wrote:
> >>> On Sat, Apr 1, 2017 at 7:18 AM, Wu Hao wrote:
> >>>
> >>> Hi Hao
On Wed, Jul 26, 2017 at 9:20 AM, Alan Tull wrote:
> On Wed, Jul 26, 2017 at 4:50 AM, Wu Hao wrote:
>> On Tue, Jul 25, 2017 at 04:32:10PM -0500, Alan Tull wrote:
>>> On Sat, Apr 1, 2017 at 7:18 AM, Wu Hao wrote:
>>>
>>> Hi Hao,
>>>
>>> > On Fri, Mar 31, 2017 at 12:01:13PM -0700, matthew.gerl...@l
On Wed, Jul 26, 2017 at 4:50 AM, Wu Hao wrote:
> On Tue, Jul 25, 2017 at 04:32:10PM -0500, Alan Tull wrote:
>> On Sat, Apr 1, 2017 at 7:18 AM, Wu Hao wrote:
>>
>> Hi Hao,
>>
>> > On Fri, Mar 31, 2017 at 12:01:13PM -0700, matthew.gerl...@linux.intel.com
>> > wrote:
>> >> On Fri, 31 Mar 2017, Wu H
On Tue, Jul 25, 2017 at 04:32:10PM -0500, Alan Tull wrote:
> On Sat, Apr 1, 2017 at 7:18 AM, Wu Hao wrote:
>
> Hi Hao,
>
> > On Fri, Mar 31, 2017 at 12:01:13PM -0700, matthew.gerl...@linux.intel.com
> > wrote:
> >> On Fri, 31 Mar 2017, Wu Hao wrote:
> >> >On Fri, Mar 31, 2017 at 08:09:09AM +020
On Sat, Apr 1, 2017 at 7:18 AM, Wu Hao wrote:
Hi Hao,
> On Fri, Mar 31, 2017 at 12:01:13PM -0700, matthew.gerl...@linux.intel.com
> wrote:
>> On Fri, 31 Mar 2017, Wu Hao wrote:
>> >On Fri, Mar 31, 2017 at 08:09:09AM +0200, Greg KH wrote:
>> >>On Thu, Mar 30, 2017 at 08:08:02PM +0800, Wu Hao wro
On Fri, Mar 31, 2017 at 12:01:13PM -0700, matthew.gerl...@linux.intel.com wrote:
> On Fri, 31 Mar 2017, Wu Hao wrote:
> >On Fri, Mar 31, 2017 at 08:09:09AM +0200, Greg KH wrote:
> >>On Thu, Mar 30, 2017 at 08:08:02PM +0800, Wu Hao wrote:
> >>>During FPGA device (e.g PCI-based) discovery, platform d
On Fri, Mar 31, 2017 at 04:10:09PM +0200, Greg KH wrote:
> On Fri, Mar 31, 2017 at 09:31:09PM +0800, Wu Hao wrote:
> > > On Thu, Mar 30, 2017 at 08:08:02PM +0800, Wu Hao wrote:
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +
> > > > +static DEFINE_IDA(fpga_dev_
On Fri, 31 Mar 2017, Wu Hao wrote:
On Fri, Mar 31, 2017 at 08:09:09AM +0200, Greg KH wrote:
On Thu, Mar 30, 2017 at 08:08:02PM +0800, Wu Hao wrote:
During FPGA device (e.g PCI-based) discovery, platform devices are
registered for different FPGA function units. But the device node path
isn't
On Fri, Mar 31, 2017 at 09:31:09PM +0800, Wu Hao wrote:
> > On Thu, Mar 30, 2017 at 08:08:02PM +0800, Wu Hao wrote:
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +
> > > +static DEFINE_IDA(fpga_dev_ida);
> > > +static struct class *fpga_dev_class;
> > > +
> > > +static s
> On Thu, Mar 30, 2017 at 08:08:02PM +0800, Wu Hao wrote:
> > During FPGA device (e.g PCI-based) discovery, platform devices are
> > registered for different FPGA function units. But the device node path
> > isn't quite friendly to applications.
> >
> > Consider this case, applications want to a
On Fri, Mar 31, 2017 at 11:03:28AM +0200, Greg KH wrote:
> On Fri, Mar 31, 2017 at 03:48:42PM +0800, Wu Hao wrote:
> > On Fri, Mar 31, 2017 at 08:09:09AM +0200, Greg KH wrote:
> > > On Thu, Mar 30, 2017 at 08:08:02PM +0800, Wu Hao wrote:
> > > > During FPGA device (e.g PCI-based) discovery, platfor
On Fri, Mar 31, 2017 at 03:48:42PM +0800, Wu Hao wrote:
> On Fri, Mar 31, 2017 at 08:09:09AM +0200, Greg KH wrote:
> > On Thu, Mar 30, 2017 at 08:08:02PM +0800, Wu Hao wrote:
> > > During FPGA device (e.g PCI-based) discovery, platform devices are
> > > registered for different FPGA function units.
On Fri, Mar 31, 2017 at 08:09:09AM +0200, Greg KH wrote:
> On Thu, Mar 30, 2017 at 08:08:02PM +0800, Wu Hao wrote:
> > During FPGA device (e.g PCI-based) discovery, platform devices are
> > registered for different FPGA function units. But the device node path
> > isn't quite friendly to applicatio
On Thu, Mar 30, 2017 at 08:08:02PM +0800, Wu Hao wrote:
> During FPGA device (e.g PCI-based) discovery, platform devices are
> registered for different FPGA function units. But the device node path
> isn't quite friendly to applications.
>
> Consider this case, applications want to access child de
On Thu, Mar 30, 2017 at 08:08:02PM +0800, Wu Hao wrote:
> During FPGA device (e.g PCI-based) discovery, platform devices are
> registered for different FPGA function units. But the device node path
> isn't quite friendly to applications.
>
> Consider this case, applications want to access child de
During FPGA device (e.g PCI-based) discovery, platform devices are
registered for different FPGA function units. But the device node path
isn't quite friendly to applications.
Consider this case, applications want to access child device's sysfs file
for some information.
1) Access using bus-based
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