Re: [PATCH 02/11] dt-bindings: Add an enable method to RISC-V

2018-08-08 Thread Rob Herring
On Thu, Aug 2, 2018 at 5:50 AM Christoph Hellwig wrote: > > From: Palmer Dabbelt > > RISC-V doesn't currently specify a mechanism for enabling or disabling > CPUs. Instead, we assume that all CPUs are enabled on boot, and if > someone wants to save power we instead put a CPU to sleep via a WFI >

[PATCH 02/11] dt-bindings: Add an enable method to RISC-V

2018-08-02 Thread Christoph Hellwig
From: Palmer Dabbelt RISC-V doesn't currently specify a mechanism for enabling or disabling CPUs. Instead, we assume that all CPUs are enabled on boot, and if someone wants to save power we instead put a CPU to sleep via a WFI loop. Future systems may have an explicit mechanism for putting a CP