Re: [PATCH 0/2] Add support for StorageD3Enable _DSD property

2020-05-18 Thread Dan Williams
On Mon, May 18, 2020 at 6:52 AM David Woodhouse wrote: > > On Wed, 2020-04-29 at 05:20 +, Williams, Dan J wrote: > > The *patch* is not trying to overrule NVME, and the best I can say is > > that the Intel Linux team was not in the loop when this was being > > decided between the platform BIOS

Re: [PATCH 0/2] Add support for StorageD3Enable _DSD property

2020-05-18 Thread David Woodhouse
On Wed, 2020-04-29 at 05:20 +, Williams, Dan J wrote: > The *patch* is not trying to overrule NVME, and the best I can say is > that the Intel Linux team was not in the loop when this was being > decided between the platform BIOS implemenation and whomever thought > they could just publish ra

Re: [PATCH 0/2] Add support for StorageD3Enable _DSD property

2020-05-01 Thread David E. Box
On Fri, 2020-05-01 at 15:12 +0200, h...@lst.de wrote: > On Wed, Apr 29, 2020 at 09:11:13AM -0700, David E. Box wrote: > > Not drop completely. This patch copied the code used to read _DSD > > properties under PCI root ports. But I agree that such properties > > should apply to all devices on those

Re: [PATCH 0/2] Add support for StorageD3Enable _DSD property

2020-05-01 Thread h...@lst.de
On Wed, Apr 29, 2020 at 09:11:13AM -0700, David E. Box wrote: > Not drop completely. This patch copied the code used to read _DSD > properties under PCI root ports. But I agree that such properties > should apply to all devices on those ports and unfortuntely that's not > the case here. BIOS got it

Re: [PATCH 0/2] Add support for StorageD3Enable _DSD property

2020-05-01 Thread h...@lst.de
On Wed, Apr 29, 2020 at 05:20:09AM +, Williams, Dan J wrote: > > The platform can know which pm policies will save the most power. But > > since the solution doesn't apply to all PCIe devices (despite BIOS > > specifying it that way) I'll withdraw this patch. Thanks. > > Wait, why withdraw? In

Re: [PATCH 0/2] Add support for StorageD3Enable _DSD property

2020-04-29 Thread David E. Box
On Wed, 2020-04-29 at 05:20 +, Williams, Dan J wrote: > On Tue, 2020-04-28 at 08:27 -0700, David E. Box wrote: > > On Tue, 2020-04-28 at 16:22 +0200, Christoph Hellwig wrote: > > > On Tue, Apr 28, 2020 at 07:09:59AM -0700, David E. Box wrote: > > > > > I'm not sure who came up with the idea to

Re: [PATCH 0/2] Add support for StorageD3Enable _DSD property

2020-04-29 Thread Keith Busch
On Wed, Apr 29, 2020 at 05:20:09AM +, Williams, Dan J wrote: > On Tue, 2020-04-28 at 08:27 -0700, David E. Box wrote: > > On Tue, 2020-04-28 at 16:22 +0200, Christoph Hellwig wrote: > > > On Tue, Apr 28, 2020 at 07:09:59AM -0700, David E. Box wrote: > > > > > I'm not sure who came up with the i

Re: [PATCH 0/2] Add support for StorageD3Enable _DSD property

2020-04-28 Thread Williams, Dan J
On Tue, 2020-04-28 at 08:27 -0700, David E. Box wrote: > On Tue, 2020-04-28 at 16:22 +0200, Christoph Hellwig wrote: > > On Tue, Apr 28, 2020 at 07:09:59AM -0700, David E. Box wrote: > > > > I'm not sure who came up with the idea to put this into ACPI, > > > > but > > > > it > > > > belongs into NV

Re: [PATCH 0/2] Add support for StorageD3Enable _DSD property

2020-04-28 Thread David E. Box
On Tue, 2020-04-28 at 16:22 +0200, Christoph Hellwig wrote: > On Tue, Apr 28, 2020 at 07:09:59AM -0700, David E. Box wrote: > > > I'm not sure who came up with the idea to put this into ACPI, but > > > it > > > belongs into NVMe. Please talk to the NVMe technical working > > > group > > > instead

Re: [PATCH 0/2] Add support for StorageD3Enable _DSD property

2020-04-28 Thread Christoph Hellwig
On Tue, Apr 28, 2020 at 07:09:59AM -0700, David E. Box wrote: > > I'm not sure who came up with the idea to put this into ACPI, but it > > belongs into NVMe. Please talk to the NVMe technical working group > > instead of trying to overrules them in an unrelated group that > > doesn't > > apply to

Re: [PATCH 0/2] Add support for StorageD3Enable _DSD property

2020-04-28 Thread David E. Box
On Tue, 2020-04-28 at 07:13 +0200, Christoph Hellwig wrote: > On Mon, Apr 27, 2020 at 05:32:12PM -0700, David E. Box wrote: > > NVMe storage power management during suspend-to-idle, particularly > > on > > laptops, has been inconsistent with some devices working with D3 > > while > > others must re