Re: [PATCH] vfio/pci: Virtualize Maximum Payload Size

2017-09-20 Thread Auger Eric
Hi Alex, On 19/09/2017 18:58, Alex Williamson wrote: > With virtual PCI-Express chipsets, we now see userspace/guest drivers > trying to match the physical MPS setting to a virtual downstream port. > Of course a lone physical device surrounded by virtual interconnects > cannot make a correct decis

Re: [PATCH] vfio/pci: Virtualize Maximum Payload Size

2017-09-20 Thread Auger Eric
Hi Sinan, On 20/09/2017 18:29, Sinan Kaya wrote: > On 9/20/2017 12:11 PM, Alex Williamson wrote: >> My impression is that the issue would be inefficiency. There should be >> nothing functionally wrong with a read request less than MPS, but we're >> not "filling" the TLP as much as the topology al

Re: [PATCH] vfio/pci: Virtualize Maximum Payload Size

2017-09-20 Thread Sinan Kaya
On 9/20/2017 12:11 PM, Alex Williamson wrote: > My impression is that the issue would be inefficiency. There should be > nothing functionally wrong with a read request less than MPS, but we're > not "filling" the TLP as much as the topology allows. Is that your > understanding as well, Sinan? Th

Re: [PATCH] vfio/pci: Virtualize Maximum Payload Size

2017-09-20 Thread Alex Williamson
On Wed, 20 Sep 2017 16:26:25 +0200 Auger Eric wrote: > Hi Sinan, > > On 20/09/2017 15:01, Sinan Kaya wrote: > > On 9/20/2017 3:59 AM, Auger Eric wrote: > >>> My impression is that MRRS is predominantly device and driver > >>> dependent, not topology dependent. A device can send a read request

Re: [PATCH] vfio/pci: Virtualize Maximum Payload Size

2017-09-20 Thread Sinan Kaya
On 9/20/2017 10:26 AM, Auger Eric wrote: >> Because completions are required to be a minimum of MPS size. If MRRS > MPS, >> read response is sent as multiple completions. > With that patch, you can end up with MRRS < MPS. Do I understand > correctly this is an issue? To give the right context, I t

Re: [PATCH] vfio/pci: Virtualize Maximum Payload Size

2017-09-20 Thread Auger Eric
Hi Sinan, On 20/09/2017 15:01, Sinan Kaya wrote: > On 9/20/2017 3:59 AM, Auger Eric wrote: >>> My impression is that MRRS is predominantly device and driver >>> dependent, not topology dependent. A device can send a read request >>> with a size larger than MPS, which implies that the device suppl

Re: [PATCH] vfio/pci: Virtualize Maximum Payload Size

2017-09-20 Thread Sinan Kaya
On 9/20/2017 9:01 AM, Sinan Kaya wrote: > The only valid criteria is that MRRS needs to be a multiple of MPS. > > https://linuxplumbersconf.org/2017/ocw//system/presentations/4732/original/crs.pdf > Apologies for sending the wrong link. Correcting it. https://linuxplumbersconf.org/2017/ocw//sys

Re: [PATCH] vfio/pci: Virtualize Maximum Payload Size

2017-09-20 Thread Sinan Kaya
On 9/20/2017 3:59 AM, Auger Eric wrote: >> My impression is that MRRS is predominantly device and driver >> dependent, not topology dependent. A device can send a read request >> with a size larger than MPS, which implies that the device supplying >> the read data would split it into multiple TLPs

Re: [PATCH] vfio/pci: Virtualize Maximum Payload Size

2017-09-20 Thread Auger Eric
Hi Alex, On 19/09/2017 22:20, Alex Williamson wrote: > [cc +linux-pci, Sinan] > > On Tue, 19 Sep 2017 19:50:37 +0200 > Auger Eric wrote: > >> Hi Alex, >> >> On 19/09/2017 18:58, Alex Williamson wrote: >>> With virtual PCI-Express chipsets, we now see userspace/guest drivers >>> trying to match

Re: [PATCH] vfio/pci: Virtualize Maximum Payload Size

2017-09-19 Thread Alex Williamson
[cc +linux-pci, Sinan] On Tue, 19 Sep 2017 19:50:37 +0200 Auger Eric wrote: > Hi Alex, > > On 19/09/2017 18:58, Alex Williamson wrote: > > With virtual PCI-Express chipsets, we now see userspace/guest drivers > > trying to match the physical MPS setting to a virtual downstream port. > > Of cour

Re: [PATCH] vfio/pci: Virtualize Maximum Payload Size

2017-09-19 Thread Auger Eric
Hi Alex, On 19/09/2017 18:58, Alex Williamson wrote: > With virtual PCI-Express chipsets, we now see userspace/guest drivers > trying to match the physical MPS setting to a virtual downstream port. > Of course a lone physical device surrounded by virtual interconnects > cannot make a correct decis

[PATCH] vfio/pci: Virtualize Maximum Payload Size

2017-09-19 Thread Alex Williamson
With virtual PCI-Express chipsets, we now see userspace/guest drivers trying to match the physical MPS setting to a virtual downstream port. Of course a lone physical device surrounded by virtual interconnects cannot make a correct decision for a proper MPS setting. Instead, let's virtualize the M