On Thu, Jun 02, 2016 at 05:48:28PM -0700, Bjorn Andersson wrote:
> For dm uarts in pio mode tx data is transferred to the fifo register 4
> bytes at a time, but care is not taken when these 4 bytes spans the end
> of the xmit buffer so the loop might read up to 3 bytes past the buffer
> and then sk
On 06/02, Bjorn Andersson wrote:
> For dm uarts in pio mode tx data is transferred to the fifo register 4
> bytes at a time, but care is not taken when these 4 bytes spans the end
> of the xmit buffer so the loop might read up to 3 bytes past the buffer
> and then skip the actual data at the beginn
On 06/02/16 17:48, Bjorn Andersson wrote:
> For dm uarts in pio mode tx data is transferred to the fifo register 4
> bytes at a time, but care is not taken when these 4 bytes spans the end
> of the xmit buffer so the loop might read up to 3 bytes past the buffer
> and then skip the actual data at t
For dm uarts in pio mode tx data is transferred to the fifo register 4
bytes at a time, but care is not taken when these 4 bytes spans the end
of the xmit buffer so the loop might read up to 3 bytes past the buffer
and then skip the actual data at the beginning of the buffer.
Fix this by, analogou
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