Re: [PATCH] spi: rockchip: limit transfers to (64K - 1) bytes

2016-07-14 Thread Brian Norris
On Fri, Jul 15, 2016 at 10:42:55AM +0800, Shawn Lin wrote: > 在 2016/7/15 10:31, Brian Norris 写道: > >So maybe there's a driver bug in the PIO path that gives us an > >off-by-one error. I poked around a bit and couldn't figure out anything, > >so I sent this. Technically, this patch is still valid (e

Re: [PATCH] spi: rockchip: limit transfers to (64K - 1) bytes

2016-07-14 Thread Shawn Lin
在 2016/7/15 10:31, Brian Norris 写道: Hi Shawn, On Fri, Jul 15, 2016 at 09:56:59AM +0800, Shawn Lin wrote: 在 2016/7/15 9:30, Brian Norris 写道: The Rockchip SPI controller's length register only supports 16-bits, yielding a maximum length of 64KiB (the CTRLR1 register holds "length - 1"). Trying t

Re: [PATCH] spi: rockchip: limit transfers to (64K - 1) bytes

2016-07-14 Thread Brian Norris
Hi Shawn, On Fri, Jul 15, 2016 at 09:56:59AM +0800, Shawn Lin wrote: > 在 2016/7/15 9:30, Brian Norris 写道: > >The Rockchip SPI controller's length register only supports 16-bits, > >yielding a maximum length of 64KiB (the CTRLR1 register holds "length - > >1"). Trying to transfer more than that (e.

[PATCH] spi: rockchip: limit transfers to (64K - 1) bytes

2016-07-14 Thread Brian Norris
The Rockchip SPI controller's length register only supports 16-bits, yielding a maximum length of 64KiB (the CTRLR1 register holds "length - 1"). Trying to transfer more than that (e.g., with a large SPI flash read) will cause the driver to hang. Now, it seems that while theoretically we should be