In case of xspi work in busy condition, may send bytes failed.
once something wrong, spi controller did't work any more
My test found this situation appear in both of read/write process.
so when TX FIFO is full, add one byte delay before send data;
Signed-off-by: sxauwsk
---
drivers/spi/spi-cad
In case of xspi work in busy condition, may send bytes failed then caused
communication failure. once something wrong, spi controller did't work any more.
My test found this situation appear in both of read/write operation.
so when TX FIFO is full, add one byte delay before send data.
Signed-off-
On Mon, Apr 09, 2018 at 07:16:50PM +0800, sxauwsk wrote:
> In case of xspi work in busy condition, may send bytes failed.
> Add one bytes delay
> while ((trans_cnt < CDNS_SPI_FIFO_DEPTH) &&
> (xspi->tx_bytes > 0)) {
> +
> + /* When xspi in busy condition, bytes may s
In case of xspi work in busy condition, may send bytes failed.
Add one bytes delay
Signed-off-by: sxauwsk
Signed-off-by: guojian
Signed-off-by: wangshikai
---
drivers/spi/spi-cadence.c |6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/spi/spi-cadence.c b/drivers/spi/spi-cade
On Tue, Apr 10, 2018 at 09:12:32PM +0800, sxau...@163.com wrote:
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>
>
>
> sxau...@163.com
Please submit patches in the format described in SubmittingPatches, my
mail program isn't seeing anything in the mail except what's quoted
above.
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