On Fri, Oct 7, 2016 at 6:54 AM, Aaron Brice wrote:
> - The DMA error interrupt bit is in a different position as
>compared to the sdhci standard. This is accounted for in
>many cases, but not handled in the case of clearing the
>INT_STATUS register by writing a 1 to that location.
>
- The DMA error interrupt bit is in a different position as
compared to the sdhci standard. This is accounted for in
many cases, but not handled in the case of clearing the
INT_STATUS register by writing a 1 to that location.
- The HOST_CONTROL register is very different as compared to
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