u-B07263
> Subject: RE: [PATCH] sata_fsl: add workaround for data length mismatch on
> freescale V2 controller
>
> > + /* Read command completed register */
> > + done_mask = ioread32(hcr_base + CC);
> > +
> > + if (host_priv->quirks & SATA_F
> + /* Read command completed register */
> + done_mask = ioread32(hcr_base + CC);
> +
> + if (host_priv->quirks & SATA_FSL_QUIRK_V2_ERRATA) {
> + if (unlikely(hstatus & INT_ON_DATA_LENGTH_MISMATCH)) {
> + for (tag = 0; tag < ATA_MAX_QUEUE; tag++) {
> +
> The freescale V2 SATA controller checks
> if the received data length matches
> the programmed length 'ttl', if not,
> it assumes that this is an error.
...
Can you tell us exactly what
"The freescale V2 SATA controller" is,
and what versions of what devices contain it?
Thanks,
Clive
--
To unsu
The freescale V2 SATA controller checks if the received data length matches
the programmed length 'ttl', if not, it assumes that this is an error.
In ATAPI, the 'ttl' is based on max allocation length and not the actual
data transfer length, controller will raise 'DLM' (Data length Mismatch)
error
4 matches
Mail list logo