Re: [PATCH] riscv: Fix udelay in RV32.

On Thu, May 30, 2019 at 01:52:58PM +0800, Christoph Hellwig wrote: > On Tue, May 28, 2019 at 05:26:49PM +0800, Nick Hu wrote: > > In RV32, udelay would delay the wrong cycle. > > When it shifts right "UDELAY_SHITFT" bits, it > > either delays 0 cycle or 1 cycle. It only works > > correctly in RV64.

Re: [PATCH] riscv: Fix udelay in RV32.

On Tue, May 28, 2019 at 05:26:49PM +0800, Nick Hu wrote: > In RV32, udelay would delay the wrong cycle. > When it shifts right "UDELAY_SHITFT" bits, it > either delays 0 cycle or 1 cycle. It only works > correctly in RV64. Because the 'ucycles' always > needs to be 64 bits variable. Please use up

Re: [PATCH] riscv: Fix udelay in RV32.

On Tue, 28 May 2019 02:26:49 PDT (-0700), nic...@andestech.com wrote: In RV32, udelay would delay the wrong cycle. When it shifts right "UDELAY_SHITFT" bits, it either delays 0 cycle or 1 cycle. It only works correctly in RV64. Because the 'ucycles' always needs to be 64 bits variable. Signed-of

[PATCH] riscv: Fix udelay in RV32.

In RV32, udelay would delay the wrong cycle. When it shifts right "UDELAY_SHITFT" bits, it either delays 0 cycle or 1 cycle. It only works correctly in RV64. Because the 'ucycles' always needs to be 64 bits variable. Signed-off-by: Nick Hu --- arch/riscv/lib/delay.c | 2 +- 1 file changed, 1 ins