On Thu, Feb 09, 2017 at 01:33:06PM +0200, Andy Shevchenko wrote:
> On Thu, 2017-02-09 at 12:17 +0530, Rajneesh Bhardwaj wrote:
> > On Mon, Feb 06, 2017 at 05:09:51AM -0800, Shanth Murthy wrote:
>
> > > Signed-off-by: Rajneesh Bhardwaj
>
> > > +static int intel_pmc_s0ix_counter_read(u64 *data)
>
On Thu, 2017-02-09 at 12:17 +0530, Rajneesh Bhardwaj wrote:
> On Mon, Feb 06, 2017 at 05:09:51AM -0800, Shanth Murthy wrote:
> > Signed-off-by: Rajneesh Bhardwaj
> > +static int intel_pmc_s0ix_counter_read(u64 *data)
> > +{
> > + return -EINVAL;
> > +}
> > +
>
> How about making it static in
On Mon, Feb 06, 2017 at 05:09:51AM -0800, Shanth Murthy wrote:
> This patch adds a new API to indicate S0ix residency in usec. It utilizes
> the PMC Global Control Registers (GCR) to read deep and shallow
> S0ix residency.
>
> PMC MMIO resources:
> o Lower 4kB: IPC1 (PMC inter-processor co
On Wed, 2017-02-08 at 17:32 +0530, Rajneesh Bhardwaj wrote:
> On Tue, Feb 07, 2017 at 12:19:10PM +0200, Andy Shevchenko wrote:
> > On Mon, Feb 6, 2017 at 8:31 PM, Rajneesh Bhardwaj
> > wrote:
> > > On Mon, Feb 06, 2017 at 10:01:43PM +0800, kbuild test robot wrote:
> Andy, thanks for the fix. We h
On Tue, Feb 07, 2017 at 12:19:10PM +0200, Andy Shevchenko wrote:
> On Mon, Feb 6, 2017 at 8:31 PM, Rajneesh Bhardwaj
> wrote:
> > On Mon, Feb 06, 2017 at 10:01:43PM +0800, kbuild test robot wrote:
> >> Hi Shanth,
> >>
> >> [auto build test ERROR on tip/x86/core]
> >> [also build test ERROR on v4.1
On Mon, Feb 6, 2017 at 8:31 PM, Rajneesh Bhardwaj
wrote:
> On Mon, Feb 06, 2017 at 10:01:43PM +0800, kbuild test robot wrote:
>> Hi Shanth,
>>
>> [auto build test ERROR on tip/x86/core]
>> [also build test ERROR on v4.10-rc7]
>> [if your patch is applied to the wrong git tree, please drop us a not
On Mon, Feb 06, 2017 at 10:01:43PM +0800, kbuild test robot wrote:
> Hi Shanth,
>
> [auto build test ERROR on tip/x86/core]
> [also build test ERROR on v4.10-rc7]
> [if your patch is applied to the wrong git tree, please drop us a note to
> help improve the system]
>
> url:
> https://github.
Hi Shanth,
[auto build test ERROR on tip/x86/core]
[also build test ERROR on v4.10-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Shanth-Murthy/platform-x86-intel_pmc_ipc-read-s0ix-residenc
This patch adds a new API to indicate S0ix residency in usec. It utilizes
the PMC Global Control Registers (GCR) to read deep and shallow
S0ix residency.
PMC MMIO resources:
o Lower 4kB: IPC1 (PMC inter-processor communication) interface
o Upper 4kB: GCR (Global Control Registers)
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