Re: [PATCH] mtd: spi-nor: Add 4-byte address support for is25lp256

Hi Liu, On Fri, 24 Aug 2018 22:41:41 +0800 Liu Xiang wrote: > The is25lp256 supports 4-byte opcodes and quad output. > In is25lp256, the DWORD1 of JEDEC Basic Flash Parameter Header > is 0xfff920e5. So the DWORD1[18:17] Address Bytes bits are 0b00, > means that 3-Byte only addressing. Now this l

[PATCH] mtd: spi-nor: Add 4-byte address support for is25lp256

The is25lp256 supports 4-byte opcodes and quad output. In is25lp256, the DWORD1 of JEDEC Basic Flash Parameter Header is 0xfff920e5. So the DWORD1[18:17] Address Bytes bits are 0b00, means that 3-Byte only addressing. Now this limits nor->addr_width to 3 and makes it inpossible to access the addres

[PATCH] mtd: spi-nor: Add 4-byte address support for is25lp256

The is25lp256 supports 4-byte opcodes and quad output. In is25lp256, the DWORD1 of JEDEC Basic Flash Parameter Header is 0xfff920e5. So the DWORD1[18:17] Address Bytes bits are 0b00, means that 3-Byte only addressing. Now this limits nor->addr_width to 3 and makes it inpossible to access the addres