On Fri, Mar 22, 2019 at 6:27 AM Christoph Hellwig wrote:
>
> On Wed, Mar 20, 2019 at 05:04:58PM -0700, Alistair Francis wrote:
> > > Well, it starts at 0x00, but the first one is reserved. If you think
> > > that is too confusing I'd rather throw in a comment explaining this
> > > fact rather tha
On Wed, Mar 20, 2019 at 05:04:58PM -0700, Alistair Francis wrote:
> > Well, it starts at 0x00, but the first one is reserved. If you think
> > that is too confusing I'd rather throw in a comment explaining this
> > fact rather than making the calculating more complicated.
>
> It doesn't mention t
On Wed, Mar 20, 2019 at 4:49 PM Christoph Hellwig wrote:
>
> On Wed, Mar 20, 2019 at 10:39:52PM +, Alistair Francis wrote:
> > According to the FU540 and E31 manuals the PLIC source priority
> > address starts at an offset of 0x04 and not 0x00. To aviod confusion
> > update the address and sou
On Wed, Mar 20, 2019 at 10:39:52PM +, Alistair Francis wrote:
> According to the FU540 and E31 manuals the PLIC source priority
> address starts at an offset of 0x04 and not 0x00. To aviod confusion
> update the address and source offset to match the documentation. This
> causes no difference i
According to the FU540 and E31 manuals the PLIC source priority
address starts at an offset of 0x04 and not 0x00. To aviod confusion
update the address and source offset to match the documentation. This
causes no difference in functionality.
Signed-off-by: Alistair Francis
---
drivers/irqchip/ir
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