Tim,
> So perhaps there is something else going on with the tw8689
> device/driver that is causing it to not work with MSI. We have an
> avc8000 miniPCIe with tw8689 here and can test if you send me your
> patches that enable tw8689 with msi.
I think you can use this:
http://git.linuxtv.org/hverk
On Wed, Mar 30, 2016 at 1:10 AM, Krzysztof Hałasa wrote:
> Lucas Stach writes:
>
>>> TW6869: PCI :04:00.0, IRQ 336, MMIO 0x110
>>> TW686x :04:00.0: enabling device (0140 -> 0142)
>>>
>> I don't see whee the device even tries to use MSI IRQs. Even if the
>> infrastructure is enabled it
Hi Petr
On Wed, 2016-03-30 at 14:06 +0200, Petr Štetiar wrote:
> Krzysztof Hałasa [2016-03-25 14:32:35]:
>
> Cześć,
>
> >
> > I wonder if all boards (except maybe that Toradex set) use an
> > active-low
> > PCIe reset and are now broken. Perhaps Toradex uses active-high and
> > thus
> > works.
On 03/30/2016 03:38 PM, Tim Harvey wrote:
> On Wed, Mar 30, 2016 at 5:50 AM, Roberto Fichera wrote:
>> On 03/30/2016 12:10 PM, Arnd Bergmann wrote:
>>> On Wednesday 30 March 2016 10:00:33 Roberto Fichera wrote:
> Check your XIO2001 routing and insure the following for proper IRQ
> mapping
On Wed, Mar 30, 2016 at 5:50 AM, Roberto Fichera wrote:
> On 03/30/2016 12:10 PM, Arnd Bergmann wrote:
>> On Wednesday 30 March 2016 10:00:33 Roberto Fichera wrote:
Check your XIO2001 routing and insure the following for proper IRQ mapping:
Slot12: IDSEL A28: socket INTA = XIO2001 INTA
>
On 03/30/2016 12:10 PM, Arnd Bergmann wrote:
> On Wednesday 30 March 2016 10:00:33 Roberto Fichera wrote:
>>> Check your XIO2001 routing and insure the following for proper IRQ mapping:
>>> Slot12: IDSEL A28: socket INTA = XIO2001 INTA
>>> Slot13: IDSEL A29: socket INTA = XIO2001 INTB
>>> Slot14: I
On Wed, Mar 30, 2016 at 9:06 AM, Petr Štetiar wrote:
> I'm really puzzled by this :-) With your patch applied I get following on
> Toradex Apalis modules:
>
> DTS: reset-gpio = <&gpio1 28 GPIO_ACTIVE_LOW>;
> dmesg: imx6q-pcie 1ffc000.pcie: phy link never came up
> gpio:gp
Krzysztof Hałasa [2016-03-25 14:32:35]:
Cześć,
> I wonder if all boards (except maybe that Toradex set) use an active-low
> PCIe reset and are now broken. Perhaps Toradex uses active-high and thus
> works.
I'm really puzzled by this :-) With your patch applied I get following on
Toradex Apalis
On Wednesday 30 March 2016 10:00:33 Roberto Fichera wrote:
> >
> > Check your XIO2001 routing and insure the following for proper IRQ mapping:
> > Slot12: IDSEL A28: socket INTA = XIO2001 INTA
> > Slot13: IDSEL A29: socket INTA = XIO2001 INTB
> > Slot14: IDSEL A30: socket INTA = XIO2001 INTC
> > Sl
Lucas Stach writes:
>> TW6869: PCI :04:00.0, IRQ 336, MMIO 0x110
>> TW686x :04:00.0: enabling device (0140 -> 0142)
>>
> I don't see whee the device even tries to use MSI IRQs. Even if the
> infrastructure is enabled it opts to use legacy INTA.
It only tries to use normal IRQ.
> The
On 03/29/2016 07:31 PM, Tim Harvey wrote:
> On Tue, Mar 29, 2016 at 9:44 AM, Roberto Fichera wrote:
>>>
>>> Roberto,
>>>
>>> What board/platform is this and what does /proc/interrupts look like?
>> It's a custom board
>>
>> root@voneus-janas-imx6q:~# cat /proc/interrupts
>>CPU0 C
On Tuesday 29 March 2016 10:38:16 Tim Harvey wrote:
> On Tue, Mar 29, 2016 at 8:24 AM, Arnd Bergmann wrote:
> > On Tuesday 29 March 2016 08:10:08 Tim Harvey wrote:
> >> Arnd,
> >>
> >> Right, on the IMX the MSI interrupt is GIC-120 which is also the
> >> legacy INTD and I do see that if I happen t
On 29/03/16 16:24, Arnd Bergmann wrote:
> On Tuesday 29 March 2016 08:10:08 Tim Harvey wrote:
>> Arnd,
>>
>> Right, on the IMX the MSI interrupt is GIC-120 which is also the
>> legacy INTD and I do see that if I happen to put a radio in a slot
>> where due to swizzling its pin1 becomes INTD (GIC-12
On Tue, Mar 29, 2016 at 8:24 AM, Arnd Bergmann wrote:
> On Tuesday 29 March 2016 08:10:08 Tim Harvey wrote:
>> Arnd,
>>
>> Right, on the IMX the MSI interrupt is GIC-120 which is also the
>> legacy INTD and I do see that if I happen to put a radio in a slot
>> where due to swizzling its pin1 becom
On Tue, Mar 29, 2016 at 9:44 AM, Roberto Fichera wrote:
> On 03/29/2016 06:40 PM, Tim Harvey wrote:
>> On Tue, Mar 29, 2016 at 9:13 AM, Roberto Fichera
>> wrote:
>>> On 03/29/2016 05:10 PM, Tim Harvey wrote:
Arnd,
Right, on the IMX the MSI interrupt is GIC-120 which is also the
>>
On Tue, Mar 29, 2016 at 9:13 AM, Roberto Fichera wrote:
> On 03/29/2016 05:10 PM, Tim Harvey wrote:
>> Arnd,
>>
>> Right, on the IMX the MSI interrupt is GIC-120 which is also the
>> legacy INTD and I do see that if I happen to put a radio in a slot
>> where due to swizzling its pin1 becomes INTD
On 03/29/2016 06:40 PM, Tim Harvey wrote:
> On Tue, Mar 29, 2016 at 9:13 AM, Roberto Fichera wrote:
>> On 03/29/2016 05:10 PM, Tim Harvey wrote:
>>> Arnd,
>>>
>>> Right, on the IMX the MSI interrupt is GIC-120 which is also the
>>> legacy INTD and I do see that if I happen to put a radio in a slot
On 03/29/2016 05:10 PM, Tim Harvey wrote:
> Arnd,
>
> Right, on the IMX the MSI interrupt is GIC-120 which is also the
> legacy INTD and I do see that if I happen to put a radio in a slot
> where due to swizzling its pin1 becomes INTD (GIC-120) the interrupt
> does fire and the device works. Any ot
On Tuesday 29 March 2016 08:10:08 Tim Harvey wrote:
> Arnd,
>
> Right, on the IMX the MSI interrupt is GIC-120 which is also the
> legacy INTD and I do see that if I happen to put a radio in a slot
> where due to swizzling its pin1 becomes INTD (GIC-120) the interrupt
> does fire and the device wo
On Tue, Mar 29, 2016 at 7:50 AM, Arnd Bergmann wrote:
> On Tuesday 29 March 2016 07:29:34 Tim Harvey wrote:
>> On Tue, Mar 29, 2016 at 6:52 AM, Arnd Bergmann wrote:
>> > On Tuesday 29 March 2016 06:32:29 Tim Harvey wrote:
>
>> >> I think 31e98e0d24cd2537a63e06e235e050a06b175df7 "ARM:
>> >> imx_v6
On Tuesday 29 March 2016 07:29:34 Tim Harvey wrote:
> On Tue, Mar 29, 2016 at 6:52 AM, Arnd Bergmann wrote:
> > On Tuesday 29 March 2016 06:32:29 Tim Harvey wrote:
> >> I think 31e98e0d24cd2537a63e06e235e050a06b175df7 "ARM:
> >> imx_v6_v7_defconfig: enable PCI_MSI" should be reverted as well unti
On Tue, Mar 29, 2016 at 6:52 AM, Arnd Bergmann wrote:
> On Tuesday 29 March 2016 06:32:29 Tim Harvey wrote:
>> >
>> > There is no upstream driver for this chip, so I don't know where to look
>> > to find out if the driver tries to enable MSI.
>> >
>> > Is what you are saying that if you enable MSI
On Tue, Mar 29, 2016 at 5:55 AM, Lucas Stach wrote:
> I would suspect that most boards specify the reset polarity the wrong
> way around. Fixing this without breaking DT stability is hard. OTOH we
It is not hard if we just revert the buggy commit.
> could just argue that the system description
On Tuesday 29 March 2016 06:32:29 Tim Harvey wrote:
> >
> > There is no upstream driver for this chip, so I don't know where to look
> > to find out if the driver tries to enable MSI.
> >
> > Is what you are saying that if you enable MSI support in the kernel, it
> > breaks legacy IRQs?
>
> Yes -
On Tue, Mar 29, 2016 at 3:55 AM, Lucas Stach wrote:
> Am Dienstag, den 29.03.2016, 12:39 +0200 schrieb Krzysztof Hałasa:
>> Lucas Stach writes:
>>
>> > Is this working with v4.4 and PCI_MSI enabled? I'm sure I've tested MSI
>> > IRQs before enabling them in the defconfig and they have been workin
On Tuesday 29 March 2016 12:55:21 Lucas Stach wrote:
> Am Dienstag, den 29.03.2016, 12:39 +0200 schrieb Krzysztof Hałasa:
> > Lucas Stach writes:
> >
> > > Is this working with v4.4 and PCI_MSI enabled? I'm sure I've tested MSI
> > > IRQs before enabling them in the defconfig and they have been w
Am Dienstag, den 29.03.2016, 12:39 +0200 schrieb Krzysztof Hałasa:
> Lucas Stach writes:
>
> > Is this working with v4.4 and PCI_MSI enabled? I'm sure I've tested MSI
> > IRQs before enabling them in the defconfig and they have been working
> > for me for a long time before that. Tested with i210
Lucas Stach writes:
> Is this working with v4.4 and PCI_MSI enabled? I'm sure I've tested MSI
> IRQs before enabling them in the defconfig and they have been working
> for me for a long time before that. Tested with i210 on Gateworks
> Ventana.
MSI never worked for me on Ventana. I have been usi
Am Montag, den 28.03.2016, 15:06 -0700 schrieb Tim Harvey:
> On Mon, Mar 28, 2016 at 2:30 PM, Fabio Estevam wrote:
> > On Mon, Mar 28, 2016 at 5:42 PM, Tim Harvey wrote:
> >
> >> Fabio,
> >>
> >> ok - I'll respond there as I agree with the patch but not the wording
> >> of the commit (It's Gatewo
> OTOH, we should fix it some day, making sure the DTS files are fixed
> first:
>
> imx6qdl-apf6dev.dtsi: reset-gpio = <&gpio6 2 GPIO_ACTIVE_HIGH>;
> imx6qdl-aristainetos2.dtsi: reset-gpio = <&gpio2 16 GPIO_ACTIVE_HIGH>;
> imx6qdl-hummingboard.dtsi: reset-gpio = <&gpio3 4 0>; (I think RMK al
Fabio Estevam writes:
> In order to keep old dtb's working we should simply ignore the GPIO
> flags passed in the 'reset-gpio' property.
>
> That's why we need a revert. Just sent a v2, BTW.
OTOH, we should fix it some day, making sure the DTS files are fixed
first:
imx6qdl-apf6dev.dtsi:
Tim Harvey writes:
> It's not too easy to tell how many IMX6 boards incorrectly specify
> their reset-gpio polarity. I don't know what the best way to determine
> what boards use the IMX6 pcie host controller. Is there a dtc usage
> that will display the compiled dtb's then we grep out 'compatibl
Tim Harvey writes:
> ok - I'll respond there as I agree with the patch but not the wording
> of the commit (It's Gateworks 'Ventana' using IMX6 not Laguna and we
> do define the polarity properly as active-low in Ventana dt's).
Right, it's Ventana of course (I had been working with Laguna boards
On Mon, Mar 28, 2016 at 7:06 PM, Tim Harvey wrote:
>> On imx6qdl-sabresd.dtsi the PCI reset gpio polarity is set to high,
>> which is not correct, so the Wifi card could be detected even with
>> 5c5fb40de8f. So two errors in sequence and PCI still works on this
>> board :-)
>
> ouch - two wrongs
On Mon, Mar 28, 2016 at 2:30 PM, Fabio Estevam wrote:
> On Mon, Mar 28, 2016 at 5:42 PM, Tim Harvey wrote:
>
>> Fabio,
>>
>> ok - I'll respond there as I agree with the patch but not the wording
>> of the commit (It's Gateworks 'Ventana' using IMX6 not Laguna and we
>> do define the polarity prop
On Mon, Mar 28, 2016 at 5:42 PM, Tim Harvey wrote:
> Fabio,
>
> ok - I'll respond there as I agree with the patch but not the wording
> of the commit (It's Gateworks 'Ventana' using IMX6 not Laguna and we
> do define the polarity properly as active-low in Ventana dt's). It is
> the fact that the
On Mon, Mar 28, 2016 at 1:13 PM, Fabio Estevam wrote:
> Hi Tim,
>
> On Mon, Mar 28, 2016 at 4:59 PM, Tim Harvey wrote:
>
>> Fabio,
>>
>> I would agree with you on this - 5c5fb40de8f143 ("PCI: imx6: Add
>> support for active-low reset GPIO") should be reverted.
>>
>> I just finished bisecting an
Hi Tim,
On Mon, Mar 28, 2016 at 4:59 PM, Tim Harvey wrote:
> Fabio,
>
> I would agree with you on this - 5c5fb40de8f143 ("PCI: imx6: Add
> support for active-low reset GPIO") should be reverted.
>
> I just finished bisecting an issue to this specific patch only to find
> out Krzysztof found it
On Sun, Mar 27, 2016 at 5:26 PM, Fabio Estevam wrote:
> On Sun, Mar 27, 2016 at 11:44 AM, Fabio Estevam wrote:
>
>> Good catch!
>>
>> Reviewed-by: Fabio Estevam
>>
>> I will fix imx6q-sabresd.dtsi when this patch gets applied.
>
> After thinking more about it, I think the correct fix is to rever
On Sun, Mar 27, 2016 at 11:44 AM, Fabio Estevam wrote:
> Good catch!
>
> Reviewed-by: Fabio Estevam
>
> I will fix imx6q-sabresd.dtsi when this patch gets applied.
After thinking more about it, I think the correct fix is to revert
5c5fb40de8f143 ("PCI: imx6: Add support for active-low reset GPI
On Fri, Mar 25, 2016 at 10:32 AM, Krzysztof Hałasa wrote:
> A recent commit 5c5fb40de8f14391a1238db05cef88754faf9229 stated:
> Follows: linus/v4.4-rc2
> Precedes: linus/v4.5-rc1
>
> PCI: imx6: Add support for active-low reset GPIO
>
> We previously used of_get_named_gpio(), which ignores t
A recent commit 5c5fb40de8f14391a1238db05cef88754faf9229 stated:
Follows: linus/v4.4-rc2
Precedes: linus/v4.5-rc1
PCI: imx6: Add support for active-low reset GPIO
We previously used of_get_named_gpio(), which ignores the OF flags cell, so
the reset GPIO defaulted to "active high." Thi
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