Re: [PATCH] dmaengine: qcom-bam: Process multiple pending descriptors

Hi Vinod, async_desc->num_desc = num_alloc; async_desc->curr_desc = async_desc->desc; @@ -680,13 +684,18 @@ static struct dma_async_tx_descriptor *bam_prep_slave_sg(struct dma_chan *chan, static int bam_dma_terminate_all(struct dma_chan *chan) { str

Re: [PATCH] dmaengine: qcom-bam: Process multiple pending descriptors

On Thu, Jun 15, 2017 at 08:19:48PM +0530, Sricharan R wrote: > > I am not sure why suppressing callback helps? I think you should still > > continue filling up FIFO but also ensure interrupt so that callback can be > > invoked, user thread maybe waiting on that > > > > FWIW waiting for interrupt

Re: [PATCH] dmaengine: qcom-bam: Process multiple pending descriptors

Hi Vinod, On 6/15/2017 9:40 AM, Vinod Koul wrote: > On Wed, Jun 07, 2017 at 05:59:07PM +0530, Sricharan R wrote: >> The bam dmaengine has a circular FIFO to which we >> add hw descriptors that describes the transaction. >> The FIFO has space for about 4096 hw descriptors. >> >> Currently we add on

Re: [PATCH] dmaengine: qcom-bam: Process multiple pending descriptors

On Wed, Jun 07, 2017 at 05:59:07PM +0530, Sricharan R wrote: > The bam dmaengine has a circular FIFO to which we > add hw descriptors that describes the transaction. > The FIFO has space for about 4096 hw descriptors. > > Currently we add one descriptor and wait for it to > complete with interrupt

[PATCH] dmaengine: qcom-bam: Process multiple pending descriptors

The bam dmaengine has a circular FIFO to which we add hw descriptors that describes the transaction. The FIFO has space for about 4096 hw descriptors. Currently we add one descriptor and wait for it to complete with interrupt and start processing the next pending descriptor. In this way, FIFO is u