Hi,
On Wed, May 10, 2017 at 10:30 PM, Wei-Ning Huang wrote:
> Some EC chip has larger flash sector size which requires longer erase
> time. During erase the CPU is usually stalled and can't even respond to
> interrupts. We sleep a while to block any EC command from executing
> during the flash er
Some EC chip has larger flash sector size which requires longer erase
time. During erase the CPU is usually stalled and can't even respond to
interrupts. We sleep a while to block any EC command from executing
during the flash erase period.
Signed-off-by: Wei-Ning Huang
---
drivers/mfd/cros_ec_i
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