Tony Lindgren wrote:
> * Pavel Machek <[EMAIL PROTECTED]> [050419 14:10]:
>>Hi!
>>
>>>The machine is a Pentium M 2.00 GHz, supporting C0-C4 processor power states.
>>>The machine run at 2.00 GHz all the time.
>>..
>>>_passing bm_history=0x (default) to processor module:_
>>>
>>>Average curr
* Pavel Machek <[EMAIL PROTECTED]> [050419 14:10]:
> Hi!
>
> > The machine is a Pentium M 2.00 GHz, supporting C0-C4 processor power
> > states.
> > The machine run at 2.00 GHz all the time.
> ..
> > _passing bm_history=0x (default) to processor module:_
> >
> > Average current the last
Dominik Brodowski wrote:
> On Tue, Apr 19, 2005 at 11:03:30PM +0200, Thomas Renninger wrote:
>>>"All" we need to do is to update the "diff". Without dynamic ticks, if the
>>>idle loop didn't get called each jiffy, it was a big hint that there was so
>>>much activity in between, and if there is acti
Hi,
On Wed, Apr 20, 2005 at 02:08:46PM +0200, Pavel Machek wrote:
> Like "ipw2x00 looses packets" if this happens too often?
See "PCI latency error if C3 enabled" on http://ipw2100.sf.net -- it causes
network instability, frequent firmware restarts.
Dominik
-
To unsubscribe from this lis
Hi!
> > > > Because I don't consider whether there was bm_activity the last ms, I
> > > > only
> > > > consider the average, it seems to happen that I try to trigger
> > > > C3/C4 when there is just something copied and some bm active ?!?
> > >
> > > I don't think that this is perfect behaviour:
On Wed, Apr 20, 2005 at 01:57:39PM +0200, Pavel Machek wrote:
> Hi!
>
> > > Because I don't consider whether there was bm_activity the last ms, I only
> > > consider the average, it seems to happen that I try to trigger
> > > C3/C4 when there is just something copied and some bm active ?!?
> >
>
Hi!
> > Because I don't consider whether there was bm_activity the last ms, I only
> > consider the average, it seems to happen that I try to trigger
> > C3/C4 when there is just something copied and some bm active ?!?
>
> I don't think that this is perfect behaviour: if the system is idle, and
>
On Tue, Apr 19, 2005 at 11:03:30PM +0200, Thomas Renninger wrote:
> > "All" we need to do is to update the "diff". Without dynamic ticks, if the
> > idle loop didn't get called each jiffy, it was a big hint that there was so
> > much activity in between, and if there is activity, there is most like
Hi!
> The machine is a Pentium M 2.00 GHz, supporting C0-C4 processor power states.
> The machine run at 2.00 GHz all the time.
..
> _passing bm_history=0x (default) to processor module:_
>
> Average current the last 470 seconds: *1986mA* (also measured better
> values ~1800, does battery
Reducing the CC'd people a bit ...
Dominik Brodowski wrote:
> Hi,
>
> On Tue, Apr 19, 2005 at 04:56:56PM +0200, Thomas Renninger wrote:
>>If CONFIG_IDLE_HZ is set, the c-state will be evaluated on
>>three control values (averages of the last 4 measures):
>>
>>a) idle_ms -> if machine was active fo
Hi,
On Tue, Apr 19, 2005 at 04:56:56PM +0200, Thomas Renninger wrote:
> If CONFIG_IDLE_HZ is set, the c-state will be evaluated on
> three control values (averages of the last 4 measures):
>
> a) idle_ms -> if machine was active for longer than this
>value (avg), the machine is assumed to not
Here are some figures (I used your pmstats):
The machine is a Pentium M 2.00 GHz, supporting C0-C4 processor power states.
The machine run at 2.00 GHz all the time.
A lot of modules (pcmcia, usb, ...) where loaded, services that could
produce load where stopped -> processor is mostly idle.
__
On Sat, Apr 09, 2005 at 11:56:08AM +0200, Pavel Machek wrote:
> Hi!
>
> > > > > I think I have an idea on what's going on; Your system does not wake
> > > > > to
> > > > > APIC interrupt, and the system timer updates time only on other
> > > > > interrupts.
> > > > > I'm experiencing the same on
Hi!
> > > > I think I have an idea on what's going on; Your system does not wake to
> > > > APIC interrupt, and the system timer updates time only on other
> > > > interrupts.
> > > > I'm experiencing the same on a loaner ThinkPad T30.
> > > >
> > > > I'll try to do another patch today. Meanwhil
On Fri, Apr 08, 2005 at 02:58:50PM +0200, Thomas Renninger wrote:
> Tony Lindgren wrote:
> > * Thomas Renninger <[EMAIL PROTECTED]> [050408 04:34]:
> >>Here are some figures about idle/C-states:
> >>
> >>Passing bm_history=0xF to processor module makes it going into C3 and
> >>deeper.
> >>Passing
On Fri, Apr 08, 2005 at 03:42:59PM -0600, Frank Sorenson wrote:
> Tony Lindgren wrote:
> >
> > Then you might as well run timetest from same location too to make
> > sure your clock keeps correct time.
>
> Seems to be going up when under load, and down when idle, so I suppose
> it's working :) T
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Tony Lindgren wrote:
> * Frank Sorenson <[EMAIL PROTECTED]> [050408 01:49]:
>>This updated patch seems to work just fine on my machine with lapic on
>>the cmdline and CONFIG_DYN_TICK_USE_APIC disabled.
>>
>>Also, you were correct that removing lapic fr
Tony Lindgren wrote:
> * Thomas Renninger <[EMAIL PROTECTED]> [050408 04:34]:
>>Here are some figures about idle/C-states:
>>
>>Passing bm_history=0xF to processor module makes it going into C3 and deeper.
>>Passing lower values, deeper states are reached more often, but system could
>>freeze:
>
Hi!
> > > > I think I have an idea on what's going on; Your system does not wake to
> > > > APIC interrupt, and the system timer updates time only on other
> > > > interrupts.
> > > > I'm experiencing the same on a loaner ThinkPad T30.
> > > >
> > > > I'll try to do another patch today. Meanwhil
* Thomas Renninger <[EMAIL PROTECTED]> [050408 04:34]:
>
> Here are some figures about idle/C-states:
>
> Passing bm_history=0xF to processor module makes it going into C3 and deeper.
> Passing lower values, deeper states are reached more often, but system could
> freeze:
Hmm, I wonder why it f
Frank Sorenson wrote:
> Tony Lindgren wrote:
> | * Tony Lindgren <[EMAIL PROTECTED]> [050407 23:28]:
> |
> |>I think I have an idea on what's going on; Your system does not wake to
> |>APIC interrupt, and the system timer updates time only on other
> interrupts.
> |>I'm experiencing the same on a l
* Pavel Machek <[EMAIL PROTECTED]> [050408 03:30]:
> Hi!
>
> > > I think I have an idea on what's going on; Your system does not wake to
> > > APIC interrupt, and the system timer updates time only on other
> > > interrupts.
> > > I'm experiencing the same on a loaner ThinkPad T30.
> > >
> > > I
Hi!
> > I think I have an idea on what's going on; Your system does not wake to
> > APIC interrupt, and the system timer updates time only on other interrupts.
> > I'm experiencing the same on a loaner ThinkPad T30.
> >
> > I'll try to do another patch today. Meanwhile it now should work
> > with
* Frank Sorenson <[EMAIL PROTECTED]> [050408 01:49]:
> Tony Lindgren wrote:
> | * Tony Lindgren <[EMAIL PROTECTED]> [050407 23:28]:
> |
> |>I think I have an idea on what's going on; Your system does not wake to
> |>APIC interrupt, and the system timer updates time only on other
> interrupts.
> |>I
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Tony Lindgren wrote:
| * Tony Lindgren <[EMAIL PROTECTED]> [050407 23:28]:
|
|>I think I have an idea on what's going on; Your system does not wake to
|>APIC interrupt, and the system timer updates time only on other
interrupts.
|>I'm experiencing the s
* Tony Lindgren <[EMAIL PROTECTED]> [050407 23:28]:
>
> I think I have an idea on what's going on; Your system does not wake to
> APIC interrupt, and the system timer updates time only on other interrupts.
> I'm experiencing the same on a loaner ThinkPad T30.
>
> I'll try to do another patch toda
26 matches
Mail list logo