Re: [PATCH] RISC-V: Add the directive for alignment of stvec's value

2018-08-03 Thread Palmer Dabbelt
On Wed, 01 Aug 2018 18:26:48 PDT (-0700), zong...@gmail.com wrote: Palmer Dabbelt 於 2018年8月2日 週四 上午8:38寫道： On Wed, 20 Jun 2018 18:40:07 PDT (-0700), z...@andestech.com wrote: > The stvec's value must be 4 byte alignment by specification definition. > This directive avoids to stvec be set the n

Re: [PATCH] RISC-V: Add the directive for alignment of stvec's value

2018-08-02 Thread Christoph Hellwig
On Thu, Jun 21, 2018 at 09:40:07AM +0800, Zong Li wrote: > The stvec's value must be 4 byte alignment by specification definition. > This directive avoids to stvec be set the non-alignment value by the > following code in head.S > > /* Point stvec to virtual address of intruction after satp write

Re: [PATCH] RISC-V: Add the directive for alignment of stvec's value

2018-08-01 Thread Zong Li
Palmer Dabbelt 於 2018年8月2日 週四 上午8:38寫道： > > On Wed, 20 Jun 2018 18:40:07 PDT (-0700), z...@andestech.com wrote: > > The stvec's value must be 4 byte alignment by specification definition. > > This directive avoids to stvec be set the non-alignment value by the > > following code in head.S > > > >

Re: [PATCH] RISC-V: Add the directive for alignment of stvec's value

2018-08-01 Thread Palmer Dabbelt
On Wed, 20 Jun 2018 18:40:07 PDT (-0700), z...@andestech.com wrote: The stvec's value must be 4 byte alignment by specification definition. This directive avoids to stvec be set the non-alignment value by the following code in head.S /* Point stvec to virtual address of intruction after satp wr

[PATCH] RISC-V: Add the directive for alignment of stvec's value

2018-06-20 Thread Zong Li
The stvec's value must be 4 byte alignment by specification definition. This directive avoids to stvec be set the non-alignment value by the following code in head.S /* Point stvec to virtual address of intruction after satp write */ la a0, 1f add a0, a0, a1 csrw stvec, a0 Signed-off-by: Zong Li