Re: [PATCH] PCI: dwc/intel-gw: Fix enabling the legacy PCI interrupt lines

2021-04-09 Thread Lorenzo Pieralisi
On Fri, Apr 09, 2021 at 10:17:12AM +, Rahul Tanwar wrote: > On 9/4/2021 4:40 am, Martin Blumenstingl wrote: > > This email was sent from outside of MaxLinear. > > > > Hi Lorenzo, > > > > On Tue, Mar 23, 2021 at 12:36 PM Lorenzo Pieralisi > > wrote: > > > > > > On Wed, Jan 06, 2021 at 02:55

Re: [PATCH] PCI: dwc/intel-gw: Fix enabling the legacy PCI interrupt lines

2021-04-09 Thread Rahul Tanwar
On 9/4/2021 4:40 am, Martin Blumenstingl wrote: > This email was sent from outside of MaxLinear. > > Hi Lorenzo, > > On Tue, Mar 23, 2021 at 12:36 PM Lorenzo Pieralisi > wrote: > > > > On Wed, Jan 06, 2021 at 02:55:40PM +0100, Martin Blumenstingl wrote: > > > The legacy PCI interrupt lines ne

Re: [PATCH] PCI: dwc/intel-gw: Fix enabling the legacy PCI interrupt lines

2021-04-08 Thread Martin Blumenstingl
Hi Lorenzo, On Tue, Mar 23, 2021 at 12:36 PM Lorenzo Pieralisi wrote: > > On Wed, Jan 06, 2021 at 02:55:40PM +0100, Martin Blumenstingl wrote: > > The legacy PCI interrupt lines need to be enabled using PCIE_APP_IRNEN > > bits 13 (INTA), 14 (INTB), 15 (INTC) and 16 (INTD). The old code however >

Re: [PATCH] PCI: dwc/intel-gw: Fix enabling the legacy PCI interrupt lines

2021-03-23 Thread Lorenzo Pieralisi
On Wed, Jan 06, 2021 at 02:55:40PM +0100, Martin Blumenstingl wrote: > The legacy PCI interrupt lines need to be enabled using PCIE_APP_IRNEN > bits 13 (INTA), 14 (INTB), 15 (INTC) and 16 (INTD). The old code however > was taking (for example) "13" as raw value instead of taking BIT(13). > Define t

[PATCH] PCI: dwc/intel-gw: Fix enabling the legacy PCI interrupt lines

2021-01-06 Thread Martin Blumenstingl
The legacy PCI interrupt lines need to be enabled using PCIE_APP_IRNEN bits 13 (INTA), 14 (INTB), 15 (INTC) and 16 (INTD). The old code however was taking (for example) "13" as raw value instead of taking BIT(13). Define the legacy PCI interrupt bits using the BIT() macro and then use these in PCIE