On 2020/5/18 09:08, Tiezhu Yang wrote:
On 05/16/2020 07:09 PM, WANG Xuerui wrote:
On 5/16/20 3:03 PM, Tiezhu Yang wrote:
After commit 87fcfa7b7fe6 ("MIPS: Loongson64: Add generic dts"),
there already exists the node and property of Loongson CPU UART0
in loongson3-package.dtsi:
cpu_uart0: ser
On 05/16/2020 07:09 PM, WANG Xuerui wrote:
On 5/16/20 3:03 PM, Tiezhu Yang wrote:
After commit 87fcfa7b7fe6 ("MIPS: Loongson64: Add generic dts"),
there already exists the node and property of Loongson CPU UART0
in loongson3-package.dtsi:
cpu_uart0: serial@1fe001e0 {
compatible = "ns1
On 5/16/20 3:03 PM, Tiezhu Yang wrote:
After commit 87fcfa7b7fe6 ("MIPS: Loongson64: Add generic dts"),
there already exists the node and property of Loongson CPU UART0
in loongson3-package.dtsi:
cpu_uart0: serial@1fe001e0 {
compatible = "ns16550a";
reg = <0 0x1fe001e0 0x8>;
于 2020年5月16日 GMT+08:00 下午3:03:08, Tiezhu Yang 写到:
>After commit 87fcfa7b7fe6 ("MIPS: Loongson64: Add generic dts"),
>there already exists the node and property of Loongson CPU UART0
>in loongson3-package.dtsi:
>
>cpu_uart0: serial@1fe001e0 {
>compatible = "ns16550a";
>reg = <0 0
After commit 87fcfa7b7fe6 ("MIPS: Loongson64: Add generic dts"),
there already exists the node and property of Loongson CPU UART0
in loongson3-package.dtsi:
cpu_uart0: serial@1fe001e0 {
compatible = "ns16550a";
reg = <0 0x1fe001e0 0x8>;
clock-frequency = <3300>;
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