dean gaudet wrote:
On Mon, 8 Jan 2007, H. Peter Anvin wrote:
I *definitely* support the concept that RDPMC 0 should could CPU cycles by
convention in Linux.
unfortunately that'd be very limiting and annoying on core2 processors
which have dedicated perf counters for clocks unhalted (actual v
On Mon, 8 Jan 2007, H. Peter Anvin wrote:
> I *definitely* support the concept that RDPMC 0 should could CPU cycles by
> convention in Linux.
unfortunately that'd be very limiting and annoying on core2 processors
which have dedicated perf counters for clocks unhalted (actual vs.
nominal), but o
Jan Engelhardt wrote:
On Jan 8 2007 00:02, dean gaudet wrote:
transmeta decided years before intel and amd that a constant rate tsc
(unaffected by P-state) was the only sane choice. on transmeta cpus the
tsc increments at the maximum cpu frequency no matter what the P-state
(and no matter w
Jan Engelhardt wrote:
On Jan 8 2007 00:02, dean gaudet wrote:
On Fri, 5 Jan 2007, Jan Engelhardt wrote:
On Jan 4 2007 17:48, H. Peter Anvin wrote:
[i386] All Transmeta CPUs have constant TSCs
All Transmeta CPUs ever produced have constant-rate TSCs.
A TSC is ticking according to the CPU frequ
On Jan 8 2007 00:02, dean gaudet wrote:
>On Fri, 5 Jan 2007, Jan Engelhardt wrote:
>> On Jan 4 2007 17:48, H. Peter Anvin wrote:
>> >
>> >[i386] All Transmeta CPUs have constant TSCs
>> >All Transmeta CPUs ever produced have constant-rate TSCs.
>>
>> A TSC is ticking according to the CPU frequenc
On Fri, 5 Jan 2007, Jan Engelhardt wrote:
>
> On Jan 4 2007 17:48, H. Peter Anvin wrote:
> >
> >[i386] All Transmeta CPUs have constant TSCs
> >All Transmeta CPUs ever produced have constant-rate TSCs.
>
> A TSC is ticking according to the CPU frequency, is not it?
transmeta decided years befor
On Jan 4 2007 17:48, H. Peter Anvin wrote:
>
>[i386] All Transmeta CPUs have constant TSCs
>All Transmeta CPUs ever produced have constant-rate TSCs.
A TSC is ticking according to the CPU frequency, is not it?
-`J'
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[i386] All Transmeta CPUs have constant TSCs
All Transmeta CPUs ever produced have constant-rate TSCs.
Signed-off-by: H. Peter Anvin <[EMAIL PROTECTED]>
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commit 07e54489ef8a3341b20ae42b53b1254a68061204
tree 204fa19fe2b2dd3ddb1add83ec66ccda7360f4e6
parent 7523c4dd9923cab748dad9b79d0165e118e3d0
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