On Wed, Apr 29, 2015 at 07:12:32PM +0100, Geert Uytterhoeven wrote:
> On Wed, Apr 29, 2015 at 5:15 PM, Mark Rutland wrote:
> >> > diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
> >> > index 7b315e3..02c8bb4 100644
> >> > --- a/drivers/irqchip/irq-gic.c
> >> > +++ b/drivers/irqc
On Wed, Apr 29, 2015 at 5:15 PM, Mark Rutland wrote:
>> > diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
>> > index 7b315e3..02c8bb4 100644
>> > --- a/drivers/irqchip/irq-gic.c
>> > +++ b/drivers/irqchip/irq-gic.c
>> > @@ -959,6 +959,7 @@ void __init gic_init_bases(unsigned int
Hi Geert,
> >> >> > I'm also concerned that the carving up of clock inputs, power domains,
> >> >> > and other physical details is implementation-specific. I imagine that
> >> >> > pretty much every user that will care about this is using GIC-400, so
> >> >> > could we make this specific to GIC-40
Hi Mark,
On Wed, Apr 29, 2015 at 2:57 PM, Mark Rutland wrote:
>> >> >> To preserve DT stability, we would like to add these properties to the
>> >> >> affected shmobile dtsi files.
>> >> >
>> >> > ... which means that they could be wrong, and will get in the way of
>> >> > stability rather than a
Hi Geert,
> >> >> To preserve DT stability, we would like to add these properties to the
> >> >> affected shmobile dtsi files.
> >> >
> >> > ... which means that they could be wrong, and will get in the way of
> >> > stability rather than aiding it.
> >>
> >> We do know the GIC is part of the powe
Hi Mark,
On Mon, Apr 27, 2015 at 7:15 PM, Mark Rutland wrote:
> On Mon, Apr 27, 2015 at 05:43:13PM +0100, Geert Uytterhoeven wrote:
>> On Mon, Apr 27, 2015 at 5:54 PM, Mark Rutland wrote:
>> > On Mon, Apr 27, 2015 at 04:00:11PM +0100, Geert Uytterhoeven wrote:
>> >> On some SoCs, the GIC may be
On Mon, Apr 27, 2015 at 05:43:13PM +0100, Geert Uytterhoeven wrote:
> Hi Mark,
>
> On Mon, Apr 27, 2015 at 5:54 PM, Mark Rutland wrote:
> > On Mon, Apr 27, 2015 at 04:00:11PM +0100, Geert Uytterhoeven wrote:
> >> On some SoCs, the GIC may be part of a PM Domain (hardware Power and/or
> >> Clock D
Hi Mark,
On Mon, Apr 27, 2015 at 5:54 PM, Mark Rutland wrote:
> On Mon, Apr 27, 2015 at 04:00:11PM +0100, Geert Uytterhoeven wrote:
>> On some SoCs, the GIC may be part of a PM Domain (hardware Power and/or
>> Clock Domain). Document the related optional DT properties.
>>
>> Note: As the current
On Mon, Apr 27, 2015 at 5:25 PM, Rob Herring wrote:
>> --- a/Documentation/devicetree/bindings/arm/gic.txt
>> +++ b/Documentation/devicetree/bindings/arm/gic.txt
>> @@ -58,6 +58,14 @@ Optional
>>regions, used when the GIC doesn't have banked registers. The offset is
>>cpu-offset * cpu-nr.
On Mon, Apr 27, 2015 at 04:00:11PM +0100, Geert Uytterhoeven wrote:
> On some SoCs, the GIC may be part of a PM Domain (hardware Power and/or
> Clock Domain). Document the related optional DT properties.
>
> Note: As the current GIC driver doesn't support Runtime PM yet, PM
> Domain constraints m
On Mon, Apr 27, 2015 at 10:00 AM, Geert Uytterhoeven
wrote:
> On some SoCs, the GIC may be part of a PM Domain (hardware Power and/or
> Clock Domain). Document the related optional DT properties.
>
> Note: As the current GIC driver doesn't support Runtime PM yet, PM
> Domain constraints must be h
On some SoCs, the GIC may be part of a PM Domain (hardware Power and/or
Clock Domain). Document the related optional DT properties.
Note: As the current GIC driver doesn't support Runtime PM yet, PM
Domain constraints must be handled elsewhere in e.g. platform code.
Signed-off-by: Geert Uytterho
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