Re: [PATCH] ARM: dts: imx: Correct B850v3 clock assignment

On Fri, Jun 30, 2017 at 03:43:37PM +0200, Romain Perier wrote: > From: Martyn Welch > > The IPU that drives HDMI must have its pre_sel set to pll2_pfd_396m > to avoid stepping on the LVDS output's toes, as the PLL can't be clocked > to the pixel clock and to the LVDS serial clock (3.5*pixel clock

Re: [PATCH] ARM: dts: imx: Correct B850v3 clock assignment

On Fri, Jun 30, 2017 at 10:43 AM, Romain Perier wrote: > From: Martyn Welch > > The IPU that drives HDMI must have its pre_sel set to pll2_pfd_396m > to avoid stepping on the LVDS output's toes, as the PLL can't be clocked > to the pixel clock and to the LVDS serial clock (3.5*pixel clock) at the

[PATCH] ARM: dts: imx: Correct B850v3 clock assignment

From: Martyn Welch The IPU that drives HDMI must have its pre_sel set to pll2_pfd_396m to avoid stepping on the LVDS output's toes, as the PLL can't be clocked to the pixel clock and to the LVDS serial clock (3.5*pixel clock) at the same time. As we are using ipu1_di0 and ipu2_di0, ensure both a