Re: [PART1 RFC 5/9] svm: Add VMEXIT handlers for AVIC

2016-03-03 Thread Paolo Bonzini
On 03/03/2016 11:42, Suravee Suthikulpanit wrote: > In facts, instead of setting up the vAPIC backing page address when > calling kvm_arch_vcpu_load(), we should be able to do it when calling > kvm_arch_vcpu_sched_in(). This seems more appropriate since the > kvm_arch_vcpu_load() is also called i

Re: [PART1 RFC 5/9] svm: Add VMEXIT handlers for AVIC

2016-03-03 Thread Suravee Suthikulpanit
Hi On 02/19/2016 12:18 AM, Paolo Bonzini wrote: On 18/02/2016 17:27, Radim Krčmář wrote: 2016-02-18 16:53+0100, Paolo Bonzini: Patch 9 is okay, but it is also necessary to clear IsRunning in kvm_arch_vcpu_blocking and set it in kvm_arch_vcpu_unblocking. In addition, vcpu_put/vcpu_load shoul

Re: [PART1 RFC 5/9] svm: Add VMEXIT handlers for AVIC

2016-02-19 Thread Suravee Suthikulpanit
Hi On 2/19/16 18:44, Paolo Bonzini wrote: On 19/02/2016 12:39, Suravee Suthikulpanit wrote: Good point. I have made the change by introducing new function pointer, kvm_x86_ops.vcpu_blocking() and kvm_x86_ops.vcpu_unblocking(). Then provides the hook to set/unset the IsRunningBit here. Also,

Re: [PART1 RFC 5/9] svm: Add VMEXIT handlers for AVIC

2016-02-19 Thread Paolo Bonzini
On 19/02/2016 12:39, Suravee Suthikulpanit wrote: > > Good point. I have made the change by introducing new function pointer, > kvm_x86_ops.vcpu_blocking() and kvm_x86_ops.vcpu_unblocking(). Then > provides the hook to set/unset the IsRunningBit here. Also, I no longer > set the bit in the vcpu_

Re: [PART1 RFC 5/9] svm: Add VMEXIT handlers for AVIC

2016-02-19 Thread Suravee Suthikulpanit
Hi, On 2/19/16 00:18, Paolo Bonzini wrote: On 18/02/2016 17:27, Radim Krčmář wrote: 2016-02-18 16:53+0100, Paolo Bonzini: Patch 9 is okay, but it is also necessary to clear IsRunning in kvm_arch_vcpu_blocking and set it in kvm_arch_vcpu_unblocking. In addition, vcpu_put/vcpu_load should not

Re: [PART1 RFC 5/9] svm: Add VMEXIT handlers for AVIC

2016-02-19 Thread Suravee Suthikulpanit
Hi, On 2/18/16 21:18, Radim Krčmář wrote: 2016-02-18 09:25+0700, Suravee Suthikulpanit: On 2/17/16 01:06, Radim Krčmář wrote: 2016-02-16 17:56+0100, Paolo Bonzini: On 16/02/2016 15:13, Radim Krčmář wrote: Yeah, I think atomic there means that it won't race with other writes to the same byte

Re: [PART1 RFC 5/9] svm: Add VMEXIT handlers for AVIC

2016-02-18 Thread Paolo Bonzini
On 18/02/2016 17:27, Radim Krčmář wrote: > 2016-02-18 16:53+0100, Paolo Bonzini: >> Patch 9 is okay, but it is also necessary to clear IsRunning in >> kvm_arch_vcpu_blocking and set it in kvm_arch_vcpu_unblocking. In >> addition, vcpu_put/vcpu_load should not modify IsRunning between >> kvm_arch

Re: [PART1 RFC 5/9] svm: Add VMEXIT handlers for AVIC

2016-02-18 Thread Radim Krčmář
2016-02-18 16:53+0100, Paolo Bonzini: > Patch 9 is okay, but it is also necessary to clear IsRunning in > kvm_arch_vcpu_blocking and set it in kvm_arch_vcpu_unblocking. In > addition, vcpu_put/vcpu_load should not modify IsRunning between > kvm_arch_vcpu_blocking and kvm_arch_vcpu_unblocking. Do

Re: [PART1 RFC 5/9] svm: Add VMEXIT handlers for AVIC

2016-02-18 Thread Paolo Bonzini
On 18/02/2016 16:43, Radim Krčmář wrote: > 2016-02-18 15:51+0100, Paolo Bonzini: >> On 18/02/2016 15:18, Radim Krčmář wrote: >>> KVM just has to make sure that targeted VCPUs notice the interrupt, >>> which means to kick (wake up) VCPUs that don't have IsRunning set. >>> There is no need to do an

Re: [PART1 RFC 5/9] svm: Add VMEXIT handlers for AVIC

2016-02-18 Thread Radim Krčmář
2016-02-18 15:51+0100, Paolo Bonzini: > On 18/02/2016 15:18, Radim Krčmář wrote: >> KVM just has to make sure that targeted VCPUs notice the interrupt, >> which means to kick (wake up) VCPUs that don't have IsRunning set. >> There is no need to do anything with running VCPUs, because they >> - are

Re: [PART1 RFC 5/9] svm: Add VMEXIT handlers for AVIC

2016-02-18 Thread Paolo Bonzini
On 18/02/2016 15:18, Radim Krčmář wrote: > KVM just has to make sure that targeted VCPUs notice the interrupt, > which means to kick (wake up) VCPUs that don't have IsRunning set. > There is no need to do anything with running VCPUs, because they > - are in guest mode and noticed the doorbell >

Re: [PART1 RFC 5/9] svm: Add VMEXIT handlers for AVIC

2016-02-18 Thread Radim Krčmář
2016-02-18 09:25+0700, Suravee Suthikulpanit: > On 2/17/16 01:06, Radim Krčmář wrote: >>2016-02-16 17:56+0100, Paolo Bonzini: On 16/02/2016 15:13, Radim Krčmář wrote: >>Yeah, I think atomic there means that it won't race with other writes to >>the same byte in IRR. We're fine as long a

Re: [PART1 RFC 5/9] svm: Add VMEXIT handlers for AVIC

2016-02-17 Thread Suravee Suthikulpanit
Hi On 2/17/16 01:06, Radim Krčmář wrote: 2016-02-16 17:56+0100, Paolo Bonzini: >On 16/02/2016 15:13, Radim Krčmář wrote: >>Yeah, I think atomic there means that it won't race with other writes to >>the same byte in IRR. We're fine as long as AVIC writes IRR before >>checking IsRunning on ever

Re: [PART1 RFC 5/9] svm: Add VMEXIT handlers for AVIC

2016-02-16 Thread Radim Krčmář
2016-02-16 17:56+0100, Paolo Bonzini: > On 16/02/2016 15:13, Radim Krčmář wrote: >> Yeah, I think atomic there means that it won't race with other writes to >> the same byte in IRR. We're fine as long as AVIC writes IRR before >> checking IsRunning on every destination, which it seems to be. > >

Re: [PART1 RFC 5/9] svm: Add VMEXIT handlers for AVIC

2016-02-16 Thread Paolo Bonzini
On 16/02/2016 15:13, Radim Krčmář wrote: > Yeah, I think atomic there means that it won't race with other writes to > the same byte in IRR. We're fine as long as AVIC writes IRR before > checking IsRunning on every destination, which it seems to be. More precisely, if AVIC writes all IRRs (5.1)

Re: [PART1 RFC 5/9] svm: Add VMEXIT handlers for AVIC

2016-02-16 Thread Radim Krčmář
2016-02-16 13:15+0100, Paolo Bonzini: > On 16/02/2016 07:29, Suravee Suthikulpanit wrote: >> On 2/12/16 22:38, Paolo Bonzini wrote: >>> On 12/02/2016 14:59, Suravee Suthikulpanit wrote: +case AVIC_INCMP_IPI_ERR_INVALID_INT_TYPE: | [...] +case AVIC_INCMP_IPI_ERR_TARGET_NOT_RUN: >>>

Re: [PART1 RFC 5/9] svm: Add VMEXIT handlers for AVIC

2016-02-16 Thread Paolo Bonzini
On 16/02/2016 07:29, Suravee Suthikulpanit wrote: > Hi Paolo, > > On 2/12/16 22:38, Paolo Bonzini wrote: >> >> >> On 12/02/2016 14:59, Suravee Suthikulpanit wrote: >>> + "icrh:icrl=%#010x:%08x, id=%u, index=%u\n", >>> + __func__, svm->vcpu.cpu, svm->vcpu.vcpu_id, >>> + ic

Re: [PART1 RFC 5/9] svm: Add VMEXIT handlers for AVIC

2016-02-15 Thread Suravee Suthikulpanit
Hi Paolo, On 2/12/16 22:38, Paolo Bonzini wrote: On 12/02/2016 14:59, Suravee Suthikulpanit wrote: +"icrh:icrl=%#010x:%08x, id=%u, index=%u\n", +__func__, svm->vcpu.cpu, svm->vcpu.vcpu_id, +icrh, icrl, id, index); + + switch (id) { +

Re: [PART1 RFC 5/9] svm: Add VMEXIT handlers for AVIC

2016-02-15 Thread Radim Krčmář
2016-02-12 16:38+0100, Paolo Bonzini: > On 12/02/2016 14:59, Suravee Suthikulpanit wrote: >> +case AVIC_INCMP_IPI_ERR_TARGET_NOT_RUN: >> +kvm_lapic_reg_write(apic, APIC_ICR2, icrh); >> +kvm_lapic_reg_write(apic, APIC_ICR, icrl); > > Wouldn't this cause a double injectio

Re: [PART1 RFC 5/9] svm: Add VMEXIT handlers for AVIC

2016-02-12 Thread Paolo Bonzini
On 12/02/2016 14:59, Suravee Suthikulpanit wrote: > + "icrh:icrl=%#010x:%08x, id=%u, index=%u\n", > + __func__, svm->vcpu.cpu, svm->vcpu.vcpu_id, > + icrh, icrl, id, index); > + > + switch (id) { > + case AVIC_INCMP_IPI_ERR_INVALID_INT_TYPE: > +

[PART1 RFC 5/9] svm: Add VMEXIT handlers for AVIC

2016-02-12 Thread Suravee Suthikulpanit
Introduce VMEXIT handlers, avic_incp_ipi_interception() and avic_noaccel_interception(). Signed-off-by: Suravee Suthikulpanit --- arch/x86/include/uapi/asm/svm.h | 9 +- arch/x86/kvm/svm.c | 241 2 files changed, 249 insertions(+), 1 deleti