machine
is SMP, and the function will reserve the MP-table at 0xfa000,0xfb000, 0xf4000,
and because these regions were reserved by kernel, so kernel would
print the message, but it doesn't affect you system.
--
Best regards,
michaelcmailto:[EMAIL
Hello D.,
Wednesday, July 04, 2001, 8:19:27 AM, you wrote:
Wednesday, July 04, 2001, 8:19:27 AM, you wrote:
DS> I'm curious if there is any significance to this, which occurs at each
DS> reboot on an SMP system running noapic (sometimes Netscape manages to
DS> produce a hard lockup on the syste
Hi,
Tuesday, July 03, 2001, 5:38:09 PM, you wrote:
SCT> kmap_high is intended to be called routinely for access to highmem
SCT> pages. It is coded to be as fast as possible as a result. TLB
SCT> flushes are expensive, especially on SMP, so kmap_high tries hard to
SCT> avoid unnecessary flush
Wednesday, July 04, 2001, 8:19:27 AM, you wrote:
DS> I'm curious if there is any significance to this, which occurs at each
DS> reboot on an SMP system running noapic (sometimes Netscape manages to
DS> produce a hard lockup on the system, sometimes a core dump indicates NS
DS> had signal 7, bus e
differenc between the kmap_atomic and kmap_high except
that kmap_atomic can be used in IRQ contexts. I appreciate in advance.
--
Best regards,
michaelc mailto:[EMAIL PROTECTED]
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the
Hi,
I read the Intel IA-32 developer's manual recently, and I found
the cache lines for L1 and L2 caches in Pentium4 are 64 bytes
wide, but the thing make me confused is that the default value
CONFIG_X86_L1_CACHE_SHIFT option in 2.4.x kernel is 7, why it's
not 6? Any expanation about th
Hi,
How does linux support more than 4G memory? I 've read the
documentation of Intel IA-32 Architecture, I knew that OS
just address up to 4G physical address space, If OS want to
access additional 4-GByte section of physical memory, it must
change the pointer in register CR3 or e
ction
don't support the SMP, is that cause the kernel hang at boot time.
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michaelc mailto:[EMAIL PROTECTED]
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