From: Jorik Jonker
The Orange Pi Plus board lacks voltage scaling capabilities in its
current form. This results in random freezes during boot when cpufreq is
enabled, probably due to wrong voltages.
This patch (a copy/paste of 06139c) does the following things on this
board:
- enable r_i2c
From: Jorik Jonker
In a previous commit, I made a copy/paste error in the pinmux
definitions of UART3: PG{13,14} instead of PA{13,14}. This commit takes
care of that. I have tested this commit on Orange Pi PC and Orange Pi
Plus, and it works for these boards.
Fixes: e3d11d3c45c5 ("dts: sun
From: Jorik Jonker
In a previous commit, I made a copy/paste error in the pinmux
definitions of UART3: PG{13,14} instead of PA{13,14}. This commit takes
care of that. I have tested this commit on Orange Pi PC and Orange Pi
Plus, and it works for these boards.
Fixes: e3d11d3c45c5 ("dts: sun
From: Jorik Jonker
These are the pinmux definitions for UART2-3 on H3. These UARTs can only
be muxed to these pins, so _a and @0 do not really make sense. I have
left out RTS/CTS, since these are rarely used. These can easily be
enabled using an additional pinmux set.
Signed-off-by: Jorik
From: Jorik Jonker
These peripherals can only be muxed to these pins, so they are
associated in the DTSI instead of the board files. This makes it very
easy to enable them using overlays or u-boot commands:
=> fdt set /soc/i2c@01c2ac00 status okay
Signed-off-by: Jorik Jonker
---
arch/
From: Jorik Jonker
These are the only possible pins for these peripherals according to the
datasheet.
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3.dtsi | 21 +
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts
From: Jorik Jonker
These H3 boards all expose UART1-3 on their expansion header. Since
other functions can be muxed to these pins, they are explicitly
disabled. To enable them, one could use DT overlays or U-boot commands:
=> fdt set /soc/serial@01c28c00 status okay
Signed-off-by: Jo
From: Jorik Jonker
This was done to make UART1-3 on H3 consistent, and less complicated to
enable UART1-3 on the breakout header on the several H3 board (notably
Orange Pi's). This patch adds a bit of complexity for the existing Banana
Pi, which already had the RTS/CTS associated on UART1.
From: Jorik Jonker
This is my fifth attempt to complete the UART/I2C definitions on H3.
Many thanks to Maxime and Chen-Yu for helping me understand the
philosophy behind the DTS/DTSI structure. I hope I get it and five
times is a charm :-)
Changes since v4:
* RTS/CTS for UART1 is split off
On Thu, Sep 08, 2016 at 11:01:53AM +0200, Maxime Ripard wrote:
On Thu, Sep 08, 2016 at 10:02:13AM +0200, Jorik Jonker wrote:
So, I'm going for a v5, with these changes:
- rename uart0_pins to uart0_pa_pins (as there could be a pf)
- associate uart0_pa_pins with uart0 on all H3 board DTS
Maxime, Chen-Yu: thanks for taking the effort to go through my patches
again!
On Thu, Sep 08, 2016 at 08:23:17AM +0200, Maxime Ripard wrote:
On Wed, Sep 07, 2016 at 09:58:57AM +0200, jo...@kippendief.biz wrote:
From: Jorik Jonker
Users using this UART without RTS/CTS should override the
From: Jorik Jonker
Although these peripherals are disabled, they are associated to the
pinmux definitions. Again, these are the full pinmux defs which include
RTS/CTS. One could narrow this down to RX/TX only in a board specific
DTS.
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3
From: Jorik Jonker
Users using this UART without RTS/CTS should override the association in
their board specific DTS. All (1) board using this UART uses RTS/CTS, so
this breaks nothing.
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 --
arch/arm/boot/dts
From: Jorik Jonker
These are the only possible pins for these peripherals.
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3.dtsi | 21 +
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index e9528d1
From: Jorik Jonker
These are the pinmux definitions for uarts2-3 on H3. These are the only
pins for these UARTS, but one could choose to use reduce them to only
RX/TX.
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff
From: Jorik Jonker
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 +-
arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
b/arch/arm/boot/dts
From: Jorik Jonker
These peripherals have only possible set of pins, so I have associated
the peripherals with those pinmux definitions.
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3.dtsi | 39 +++
1 file changed, 39 insertions(+)
diff --git a
From: Jorik Jonker
These are the only possible pins for UART0 on H3
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 +-
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 2 +-
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 2 +-
arch/arm/boot/dts/sun8i
From: Jorik Jonker
This is the only sensible pinmux/peripheral association for uart0, so I have
moved it from the board specific DTS to the DTSI. It is still up to the boards
to enable it, though.
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 --
arch/arm
From: Jorik Jonker
Of course, minutes after sending you notice a huge copy/paste error in
the submitted patch. Mae culpa, and here is a new version.
This is my fourth attempt to complete the UART/I2C definitions on H3.
Changes since v3:
* I was sloppy when I copy/pasted the i2c2 peripheral, so
From: Jorik Jonker
These are the only possible pins for UART0 on H3
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 +-
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 2 +-
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 2 +-
arch/arm/boot/dts/sun8i
From: Jorik Jonker
This is my third attempt to complete the UART/I2C definitions on H3.
Changes since v2:
* I have moved the pinmux/peripheral associations to the H3 DTSI file,
including already existing associations for UART0 and UART1.
* I have left out _a and @0 prefixes where there is
From: Jorik Jonker
These are the only possible pins for these peripherals.
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3.dtsi | 21 +
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index e9528d1
From: Jorik Jonker
This is the only sensible pinmux/peripheral association for uart0, so I have
moved it from the board specific DTS to the DTSI. It is still up to the boards
to enable it, though.
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 --
arch/arm
From: Jorik Jonker
Users using this UART without RTS/CTS should override the association in
their board specific DTS. All (1) board using this UART uses RTS/CTS, so
this breaks nothing.
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 --
arch/arm/boot/dts
From: Jorik Jonker
Although these peripherals are disabled, they are associated to the
pinmux definitions. Again, these are the full pinmux defs which include
RTS/CTS. One could narrow this down to RX/TX only in a board specific
DTS.
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3
From: Jorik Jonker
These peripherals have only possible set of pins, so I have associated
the peripherals with those pinmux definitions.
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3.dtsi | 39 +++
1 file changed, 39 insertions(+)
diff --git a
From: Jorik Jonker
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 +-
arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
b/arch/arm/boot/dts
From: Jorik Jonker
These are the pinmux definitions for uarts2-3 on H3. These are the only
pins for these UARTS, but one could choose to use reduce them to only
RX/TX.
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff
y do it.
Maxime, Chen-Yu: what do you think of this?
Best,
Jorik
signature.asc
Description: PGP signature
status = "disabled";
/soc/bar:
pinctrl-0 = <&uart1_pins>;
status = "disabled";
Assuming Linux/DT allows this, this would force nothing, only offer
choice and ease of use.
Best,
Jorik
Hi,
(trying again in plaintext, sorry for the HTML spam...)
A bit tricky to reply to two mails in one, as I think my reply relates
to both, but here it goes.
On 1 September 2016 at 04:42, Chen-Yu Tsai wrote:
> On Thu, Sep 1, 2016 at 3:30 AM, wrote:
>> From: Jorik Jonker
>>
From: Jorik Jonker
This enables the i2c0/i2c1 peripherals of the SoC. There is actually a third
controller, but I do not have a board on hands on which i2c2 is exposed in such
a way that I can verify that it works.
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3.dtsi | 22
From: Jorik Jonker
This board has UARTS1-3 exposed on its expansion header
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
b/arch/arm/boot/dts/sun8i-h3
From: Jorik Jonker
This board has I2C0-2 exposed on its expansion header.
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
b/arch/arm/boot/dts/sun8i-h3
From: Jorik Jonker
This board has I2C0-I2C1 exposed on its expansion header.
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
b/arch/arm/boot/dts/sun8i-h3
From: Jorik Jonker
This board has UARTS1-3 exposed on its expansion header
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
b/arch/arm/boot/dts/sun8i
From: Jorik Jonker
This adds proper pinmux definitions for i2c0 and i2c1. Although H3 has a third
i2c controller, these are not exposed on my boards. If someone actually has a
H3 board with an exposed i2c2, they could add the third.
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3
From: Jorik Jonker
This is v2 of my patch series. Just after sending I noticed the interrupts
of i2c1 were too liberally copy/paste'd. This is fixed in v2.
This series is a follow-up to Martin Ayotte's efforts to add additional UARTS
and I2C ports to the AllWinner H3 SoC DTS file
From: Jorik Jonker
This adds pinmux definitions for uarts 2 and 3 on H3 boards
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index fdf9fdb
From: Jorik Jonker
This series is a follow-up to Martin Ayotte's efforts to add additional UARTS
and I2C ports to the AllWinner H3 SoC DTS files. In this series I explicitly
leave out i2c2, since this is not broken out on my boards, so I cannot verify if
it actually works.
After the patch
From: Jorik Jonker
This board has I2C0-2 exposed on its expansion header.
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
b/arch/arm/boot/dts/sun8i-h3
From: Jorik Jonker
This board has UARTS1-3 exposed on its expansion header
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
b/arch/arm/boot/dts/sun8i-h3
From: Jorik Jonker
This board has UARTS1-3 exposed on its expansion header
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
b/arch/arm/boot/dts/sun8i
From: Jorik Jonker
This adds proper pinmux definitions for i2c0 and i2c1. Although H3 has a third
i2c controller, these are not exposed on my boards. If someone actually has a
H3 board with an exposed i2c2, they could add the third.
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3
From: Jorik Jonker
This adds pinmux definitions for uarts 2 and 3 on H3 boards
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index fdf9fdb
From: Jorik Jonker
This board has I2C0-I2C1 exposed on its expansion header.
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
b/arch/arm/boot/dts/sun8i-h3
From: Jorik Jonker
This enables the i2c0/i2c1 peripherals of the SoC. There is actually a third
controller, but I do not have a board on hands on which i2c2 is exposed in such
a way that I can verify that it works.
Signed-off-by: Jorik Jonker
---
arch/arm/boot/dts/sun8i-h3.dtsi | 22
From: Jorik Jonker
The reset register offsets for UART*, I2C* and SCR were off by a few bytes.
Signed-off-by: Jorik Jonker
---
drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
b
From: Jorik Jonker
The reset register offsets for UART*, I2C* and SCR were off by a few bytes.
---
drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
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