From: Jiada Wang
There are AVB Counter Clocks in ADG, each clock has 12bits integral
and 8 bits fractional dividers which operates with S0D1ϕ clock.
This patch registers 8 AVB Counter Clocks when clock-cells of
rcar_sound node is 2,
Signed-off-by: Jiada Wang
---
sound/soc/sh/rcar/adg.c | 306
From: Jiada Wang
This patch adds clock ID for renesas adg clocks
Signed-off-by: Jiada Wang
---
include/dt-bindings/clock/renesas-adg.h | 11 +++
1 file changed, 11 insertions(+)
create mode 100644 include/dt-bindings/clock/renesas-adg.h
diff --git a/include/dt-bindings/clock/renesas-
From: Jiada Wang
on R-Car SoCs there are AVB Counter Clocks, each clock has 12bits integral
and 8 bits fractional dividers which operates with S0D1ϕ clock.
This patch-set adds 'adg' clock to R-Car Soc, and changes adg driver to
register avb clocks when clock-cells of rcar_sound node is 2.
---
v
From: Takeshi Kihara
This patch adds ADG clock to the R8A7795 SoC.
Signed-off-by: Takeshi Kihara
Signed-off-by: Jiada Wang
---
drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c
b/drivers/clk/renesas/r8a7795-cpg-m
From: Takeshi Kihara
This patch adds ADG clock to the R8A77990 SoC.
Signed-off-by: Takeshi Kihara
Signed-off-by: Jiada Wang
---
drivers/clk/renesas/r8a77990-cpg-mssr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/renesas/r8a77990-cpg-mssr.c
b/drivers/clk/renesas/r8a77990-c
From: Takeshi Kihara
This patch adds ADG clock to the R8A7796 SoC.
Signed-off-by: Takeshi Kihara
---
drivers/clk/renesas/r8a7796-cpg-mssr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c
b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index 10567386e6dd..7
From: Takeshi Kihara
This patch adds ADG clock to the R8A77995 SoC.
Signed-off-by: Takeshi Kihara
Signed-off-by: Jiada Wang
---
drivers/clk/renesas/r8a77995-cpg-mssr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c
b/drivers/clk/renesas/r8a77995-c
From: Jiada Wang
pcm3168 codec support runtime_[resume|suspend], whenever it
is not active, it enters suspend mode, and it's clock and regulators
will be disabled. so there is no need to disable them again in
remove callback. Otherwise we got following kernel warnings,
when unload pcm3168a drive
From: Jiada Wang
Currently ssi driver only requests dma channel for SSI_0, with
naming of 'rxu/txu', which is used to transfer data to/from busif0.
But for GEN2/GEN3, there are also busif1 ~ busif7, which need to
be used when SSI works in TDM Split/Ex-Split mode.
This patch adds support to first
From: Jiada Wang
in GEN3 SSI may use different BUSIF for data transfer,
this patch adds busif property to each dai stream,
to indicate the BUSIF used by playback/capture stream.
Also adds rsnd_ssi_select_busif() to automatically select
BUSIF (currently only BUSIF0 is selected)
Signed-off-by: Ji
From: Jiada Wang
Currently ssi driver only request dma channel for SSI_0,
which is used to transfer data to/from busif0.
But in GEN3 busif1 to busif7 also maybe used, dedicated dma channels
are requested for data transfer through these busif.
Signed-off-by: Jiada Wang
---
sound/soc/sh/rcar/ss
From: Jiada Wang
Basic audio dmac register only supports busif from 0 to 3,
in order to use busif4 ~ busif7, extended audio dmac register
need to be used.
Signed-off-by: Jiada Wang
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
From: Jiada Wang
Basic audio dmac register only supports busif from 0 to 3,
in order to use busif4 ~ busif7, extended audio dmac register
need to be used.
Signed-off-by: Jiada Wang
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
From: Jiada Wang
Basic audio dmac register only supports busif from 0 to 3,
in order to use busif4 ~ busif7, extended audio dmac register
need to be used.
Signed-off-by: Jiada Wang
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/
From: Jiada Wang
This patch adds dma request number for busif0 ~ busif7
to be used by GEN3 series. GEN2 continues to use rxu/txu
for busif data transfer.
Signed-off-by: Jiada Wang
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 164 ---
1 file changed, 144 insertions(+), 20
From: Jiada Wang
Rcar audio DMA/SSIU already support to use different BUSIF to transfer data,
but BUSIF is fixed at 0. This patchset adds busif property to dai stream,
GEN3 series can automatically select BUSIF to transfer data,
based on channel and SSI mode (currently only BUSIF0 is selected).
From: Jiada Wang
This patch adds dma request number for busif0 ~ busif7
to be used by GEN3 series. GEN2 continues to use rxu/txu
for busif data transfer.
Signed-off-by: Jiada Wang
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 164 ---
1 file changed, 144 insertions(+), 20
From: Jiada Wang
Basic audio dmac register only supports busif from 0 to 3,
in order to use busif4 ~ busif7, extended audio dmac register
need to be used.
Signed-off-by: Jiada Wang
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/
From: Jiada Wang
This patch adds dma request number for busif0 ~ busif7
to be used by GEN3 series. GEN2 continues to use rxu/txu
for busif data transfer.
Signed-off-by: Jiada Wang
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 164 +++---
1 file changed, 144 insertions(+), 20
From: Jiada Wang
ssi0, ssi1, ssi2, ssi3, ssi4 and ssi9 have busif0 to busif7,
currently only busif0 is used by all ssi.
But tdm split and tdm ex-split mode, which require busif1 to
busif7.
This patch adds kctrl in ssi for dai-link, to make it possible
to configure the busif used by each dai-link
From: Jiada Wang
SSI may use different busif for data transfer, this patch
adds busif property to each dai stream, to indicate the
busif used by playback/capture stream.
Signed-off-by: Jiada Wang
---
sound/soc/sh/rcar/core.c | 16 +++-
sound/soc/sh/rcar/rsnd.h | 3 +++
sound/soc/s
From: Jiada Wang
Basic audio dmac register only supports busif from 0 to 3,
in order to use busif4 ~ busif7, extended audio dmac register
need to be used.
Signed-off-by: Jiada Wang
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
From: Jiada Wang
Basic audio dmac register only supports busif from 0 to 3,
in order to use busif4 ~ busif7, extended audio dmac register
need to be used.
Signed-off-by: Jiada Wang
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
From: Jiada Wang
Basic audio dmac register only supports busif from 0 to 3,
in order to use busif4 ~ busif7, extended audio dmac register
need to be used.
Signed-off-by: Jiada Wang
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/
From: Jiada Wang
Basic audio dmac register only supports busif from 0 to 3,
in order to use busif4 ~ busif7, extended audio dmac register
need to be used.
Signed-off-by: Jiada Wang
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/
From: Jiada Wang
This patch adds dma request number for busif1 ~ busif7
Signed-off-by: Jiada Wang
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 130 ---
1 file changed, 113 insertions(+), 17 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
b/arch/arm64/
From: Jiada Wang
This patch adds dma request number for busif1 ~ busif7
Signed-off-by: Jiada Wang
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 137 ++
1 file changed, 117 insertions(+), 20 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
b/arch/arm64
From: Jiada Wang
This patch adds dma request number for busif1 ~ busif7
Signed-off-by: Jiada Wang
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 136 +++
1 file changed, 116 insertions(+), 20 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
b/arch/arm64/
From: Jiada Wang
Rcar audio DMA/SSIU already support to use different BUSIF
to transfer data, but busif is fixed at 0.
This patch set adds kctrl interface "SSI Out/In BUSIF", which enables
to configure busif for each dai-stream used in transfer.
device tree files are updated to use extended aud
From: Jiada Wang
Currently ssi driver only request dma channel for SSI_0,
which is used to transfer data to/from busif0.
But since busif1 to busif7 also maybe used, dedicated dma channels
are request for data transfer between these busif.
Signed-off-by: Jiada Wang
---
sound/soc/sh/rcar/ssi.c
From: Jiada Wang
Following lockdep report can be triggered by write to
/sys/kernel/debug/sched_features
[ 43.094116] ==
[ 43.100345] WARNING: possible circular locking dependency detected
[ 43.106581] 4.18.0-rc6-00152-gcd3f77d74ac3-dirty
From: Jiada Wang
Following lockdep report can be triggered by write to
/sys/kernel/debug/sched_features
[ 43.094116] ==
[ 43.100345] WARNING: possible circular locking dependency detected
[ 43.106581] 4.18.0-rc6-00152-gcd3f77d74ac3-dirty
From: Andrew Gabbasov
To comply with the style of all kernel messages, add newline
to the end of every message.
Fixes: 70fb10529f61 ("ASoC: rsnd: add MIX (Mixer) support")
Signed-off-by: Andrew Gabbasov
Signed-off-by: Jiada Wang
---
sound/soc/sh/rcar/cmd.c | 2 +-
1 file changed, 1 insertion(
From: Jiada Wang
Current DPCM is caring only FE channel configuration. Sometimes
it will be trouble if user selects channel which isn't supported
by BE.
This patch adds new .dpcm_merged_chan on struct snd_soc_dai_link.
DPCM will use FE / BE merged channel if struct snd_soc_dai_link
has it.
Sign
From: Jiada Wang
Same SSI device may be used in different dai links,
by only having one dma struct in rsnd_ssi, after the first
instance's dma config be initilized, the following instances
can no longer configure dma, this causes issue, when their
dma data address are different from the first ins
From: Jiada Wang
This patch set aims to fix the race condition in rsnd_ssi_pointer_update,
between set of byte_pos and wrap it around when new buffer starts.
Jiada Wang (2):
ASoC: rsnd: ssi: fix race condition in rsnd_ssi_pointer_update
ASoC: rsnd: ssi: remove unnesessary period_pos
Change
From: Jiada Wang
period_pos can always be calculated by byte_pos and
byte_per_period, there is no reason to maintain this
variable in rsnd_dai_stream.
This patch removes period_pos from rsnd_ssi and calculates
next_period_byte with consideration of actual byte_pos value.
Signed-off-by: Jiada Wa
From: Jiada Wang
Currently there is race condition between set of byte_pos and wrap
it around when new buffer starts. If .pointer is called in-between
it will result in inconsistent pointer position be returned
from .pointer callback.
This patch increments buffer pointer atomically to avoid this
From: Jiada Wang
period_pos can always be calculated by byte_pos and
byte_per_period, there is no reason to maintain this
variable in rsnd_dai_stream.
Further more, if the passed 'byte' amount to
rsnd_ssi_pointer_update() is more than byte_per_period.
the calculation of next_period_byte isn't cor
From: Jiada Wang
Currently there is race condition between set of byte_pos and wrap
it around when new buffer starts. If .pointer is called in-between
it will result in inconsistent pointer position be returned
from .pointer callback.
This patch increments buffer pointer atomically to avoid this
From: Jiada Wang
This patch set aims to fix the race condition in rsnd_ssi_pointer_update,
between set of byte_pos and wrap it around when new buffer starts.
Jiada Wang (2):
ASoC: rsnd: ssi: fix race condition in rsnd_ssi_pointer_update
ASoC: rsnd: ssi: remove unnesessary period_pos
sound
From: Jiada Wang
register SSI_MODE is set when SSI works in TDM Extended or
TDM (Ex-)Split mode, but it isn't reset after SSI stops.
this will cause issue, if SSI starts to work in other modes
which requie SSI_MODE to have different value.
This patch resets SSI_MODE register in .stop callback,
w
From: Jiada Wang
ECSPI contorller for iMX53 and iMX6 has few hardware issues
comparing to iMX51.
The change add possibility to detect which controller is used
to apply possible workaround and limitations.
Signed-off-by: Jiada Wang
---
.../devicetree/bindings/spi/fsl-imx-cspi.txt | 1 +
From: Jiada Wang
Previously i.MX SPI controller only works in Master mode.
This patch adds support to i.MX51, i.MX53 and i.MX6 ECSPI
controller to work also in Slave mode.
Currently SPI Slave mode support patch has the following limitations:
1. The stale data in RXFIFO will be dropped when the S
From: Jiada Wang
Changes in v2:
re-workd i.MX ECSPI controller slave mode support based on Geert's work
Jiada Wang (3):
spi: imx: add selection for iMX53 and iMX6 controller
ARM: dts: imx: change compatiblity for SPI controllers on imx53 later
soc
spi: imx: Add support for SPI Slave m
From: Jiada Wang
for SPI controllers on imx53 and later SoCs, there is HW issue when
work in slave mode, as new device type 'IMX53_ECSPI' has been added
for these SPI controllers which is compatible with 'fsl,imx53-ecspi'.
This patch updates DTS to make imx53 later SPI controller only be
compati
From: Jiada Wang
previously burst length (BURST_LENGTH) is always set to equal
to bits_per_word, causes a 10us gap between each word in
transfer, which significantly affects performance.
This patch uses 32 bits transfer to simulate lower bits transfer,
and adjusts burst length runtimely to use b
From: Jiada Wang
Currently only PIO mode supports dynamic burst length adjust,
in DMA mode, bpw (bytes per word) value still has to be used
as burst length, other wise transfer issue will be caused.
This patch avoid using dynamic burst in DMA mode by set
reset dynamic_burst when DMA mode is used
From: Jiada Wang
Previously spi_imx_u32_swap_u8() and spi_imx_u32_swap_u16() directly
manipulate const tx buffer by explicit cast from const void* to u32*,
this is not valid.
This patch by swap 32 bits data one by one before write to register,
and swap received 32 bits data one by one before sav
From: Jiada Wang
v1:
only allow to use dynamic burst in PIO mode, to address the issue
reported by Fabio
v2:
add one more patch to avoid direct manipulation of tx_buf,
to address the issue reported by Sascha
Jiada Wang (2):
spi: imx: only allow dynamic burst in PIO mode
spi: imx: don't mani
From: Jiada Wang
In case either transfer->tx_buf or transfer->rx_buf is NULL,
manipulation of buffer in spi_imx_u32_swap_u[8|16]() will cause
NULL pointer dereference crash.
Add buffer check at very beginning of spi_imx_u32_swap_u[8|16](),
to avoid such crash.
Signed-off-by: Jiada Wang
Reporte
From: Jiada Wang
previously burst length (BURST_LENGTH) is always set to equal
to bits_per_word, causes a 10us gap between each word in
transfer, which significantly affects performance.
This patch uses 32 bits transfer to simulate lower bits transfer,
and adjusts burst length runtimely to use b
From: Jiada Wang
previously burst length (BURST_LENGTH) is always set to equal
to bits_per_word, causes a 10us gap between each word in transfer,
which significantly affects performance.
This patch set uses 32 bits tranfser to simulate lowers bits transfer,
and by set burst length to maximum pos
From: Jiada Wang
SPI bus controller has started to support to work in slave mode,
for device SPI controller itself works in slave mode, use name
'spidev[bus]-slv' as its name to differentiate from other
SPI devices
Signed-off-by: Jiada Wang
---
drivers/spi/spidev.c | 15 ---
1 file
From: Jiada Wang
v1:
add Slave mode support in SPI core
spidev create slave device when SPI controller work in slave mode
spi-imx support to work in slave mode
Jiada Wang (5):
spi: core: add support to work in Slave mode
spi: spidev: use different name for SPI controller slave mode dev
From: Jiada Wang
Add support for SPI bus controller to work in slave mode using
the existing SPI master framework.
- SPI device on SPI bus controller with 'spi-slave' property
declared in DT node represents SPI controller itself to work
as a slave device and listening to external SPI master d
From: Jiada Wang
ECSPI contorller for iMX53 and iMX6 has few hardware issues
comparing to iMX51.
The change add possibility to detect which controller is used
to apply possible workaround and limitations.
Signed-off-by: Jiada Wang
---
drivers/spi/spi-imx.c | 43
From: Jiada Wang
for SPI controllers on imx53 and later SoCs, there is HW issue when
work in slave mode, as new device type 'IMX53_ECSPI' has been added
for these SPI controllers which is compatible with 'fsl,imx53-ecspi'.
This patch updates DTS to make imx53 later SPI controller only be
compati
From: Jiada Wang
Previously i.MX SPI controller only works in Master mode.
This patch adds support to work also in Slave mode.
Currently SPI Slave mode support patch has the following limitations:
1. The stale data in RXFIFO will be dropped when the Slave does any new
transfer.
2. One transfe
From: Jiada Wang
Changes from v4:
update changlog to describe the reason of build failure
replace ARCH with SRCARCH in pmu-events/Build and util/header.c
Changes from v3:
replace ARCH with SRCARCH in perf
Changes from v2:
added function purify-arch, transforms both HOSTARCH and ARCH
to sup
From: Jiada Wang
with commit: 0a943cb10ce78 (tools build: Add HOSTARCH Makefile variable)
when build for ARCH=x86_64, ARCH=x86_64 is passed to perf instead of
ARCH=x86, so perf package searchs header files from
tools/arch/x86_64/include, which doesn't exist.
the following build failure is seen w
From: Jiada Wang
with commit: 0a943cb10ce78 (tools build: Add HOSTARCH Makefile variable)
the following build failure is seen when build with ARCH=x86_64
In file included from util/event.c:2:0:
tools/include/uapi/linux/mman.h:4:27: fatal error: uapi/asm/mman.h: No such
file or directory
From: Jiada Wang
Changes from v3:
replace ARCH with SRCARCH in perf
Changes from v2:
added function purify-arch, transforms both HOSTARCH and ARCH
to supported values
Jiada Wang (1):
perf tools: fix perf build with ARCH=x86_64
tools/perf/Makefile.config | 38 +++--
From: Jiada Wang
Jiada Wang (1):
tools build: transform ARCH to supported values
Changes from v2:
added function purify-arch, transforms both HOSTARCH and ARCH
to supported values
tools/scripts/Makefile.arch |6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
--
1.7.9.5
From: Jiada Wang
with commit: 0a943cb10ce7 (tools build: Add HOSTARCH Makefile variable)
the following build failure is seen with ARCH=x86_84
In file included from util/event.c:2:0:
tools/include/uapi/linux/mman.h:4:27: fatal error: uapi/asm/mman.h: No such
file or directory
compilation termina
From: Jiada Wang
Changes from v2:
Documented the reasoning about adding 1ms delay after disable of
channel bit in commit changelog and inline comment.
Jiada Wang (1):
dma: imx-sdma: add 1ms delay to ensure SDMA channel is stopped
drivers/dma/imx-sdma.c | 17 -
1 file change
From: Jiada Wang
sdma_disable_channel() cannot ensure dma is stopped to access
module's FIFOs. There is chance SDMA core is running and accessing
BD when disable of corresponding channel, this may cause sometimes
even after call of .sdma_disable_channel(), SDMA core still be
running and accessing
From: Jiada Wang
sdma_disable_channel() cannot ensure dma is stopped to access
module's FIFOs. Maybe SDMA core is running and accessing BD when
disable of corresponding channel, this may cause sometimes even
after call of .sdma_disable_channel(), SDMA core still be running
and accessing module's
From: Jiada Wang
Previously DMA watermark level is configured to fifosize/2,
DMA mode can be used only when transfer length can be divided
by 'watermark level * bpw', which makes DMA mode not pratical.
This patch adjusts watermark level to largest number (no bigger
than fifosize/2) which can div
From: Jiada Wang
Previously CLK_SET_RATE_GATE flag is only checked in clk_set_rate()
which only ensures the clock being called by clk_set_rate() won't
change rate when it has been prepared if CLK_SET_RATE_GATE flag is set.
But a clk_set_rate() request may propagate rate change to these clocks
fro
From: Jiada Wang
Previously CLK_SET_RATE_GATE flag is only checked in clk_set_rate()
which only ensures the clock being called by clk_set_rate() won't
change rate when it has been prepared if CLK_SET_RATE_GATE flag is set.
But a clk_set_rate() request may propagate rate change to these clocks
fro
71 matches
Mail list logo
