Yang
Date: Thu Sep 19 10:37:36 2019 +0800
rockchip: Update BL31_BASE to 0x4
or use the master branch in git://git.denx.de/u-boot-rockchip.git .
This is very important, or you'll be stuck at:
U-Boot TPL 2019.10-djw (Oct 22 2019 - 03:08:48)
Trying to boot fr
Jagan Teki writes:
> Hi Heiko,
>
> On Mon, Sep 30, 2019 at 2:51 AM Heiko Stuebner wrote:
>>
>> Hi Jagan,
>>
>> Am Donnerstag, 19. September 2019, 07:28:17 CEST schrieb Jagan Teki:
>> > ROC-PC is not able to boot linux console if PWM2_d is
>> > unattached to any pinctrl logic.
>> >
>> > To be pre
From: Levin Du
PWM2 is commonly used to control voltage of PWM regulator of VDD_LOG in
RK3399. On the Firefly-RK3399 board, PWM2 outputs 40 KHz square wave
from power on and the VDD_LOG is about 0.9V. When the kernel boots
normally into the system, the PWM2 keeps outputing PWM signal.
But the ke
From: Levin Du
In roc-rk3328-cc board, the signal voltage of sdmmc is supplied by the
vcc_sdio regulator, which is a mux between 1.8V and 3.3V, controlled by
a special output only gpio pin labeled "gpiomut_pmuio_iout",
corresponding bit 1 of the syscon GRF_SOC_CON10.
This special pin can now be
From: Levin Du
It is necessary for the io domain setting of the SoC to match the voltage
supplied by the regulators.
Signed-off-by: Levin Du
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
Changes in v1:
- Split from V0.
arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 12 ++
From: Levin Du
Adding a GRF GPIO controller labled "grf_gpio" to rk3328, currently
providing access to the GPIO_MUTE pin, which is manupulated by the
GRF_SOC_CON10 register.
The GPIO_MUTE pin is referred to as <&grf_gpio 0>.
Signed-off-by: Levin Du
---
Changes in v4:
- Use binding of "rockch
From: Levin Du
Hi all, this is an attemp to add sdmmc UHS support to the
ROC-RK3328-CC board.
This patch series adds a new compatible `rockchip,rk3328-grf-gpio` to
the gpio-syscon driver, which currently only support for the access of
the GPIO_MUTE pin in RK3328. Support for HDMI pins can be ad
From: Levin Du
In Rockchip RK3328, the output only GPIO_MUTE pin, originally for codec
mute control, can also be used for general purpose. It is manipulated by
the GRF_SOC_CON10 register in GRF. Aside from the GPIO_MUTE pin, the HDMI
pins can also be set in the same way.
Currently this GRF GPIO
From: Levin Du
ROC-RK3399-PC is a power efficient 4GB LPDDR4 single board
computer with USB 3.0 and Gigabit Ethernet in a form factor
compatible with the Raspberry Pi. It is based on the Rockchip
RK3399 SoC, powered by the Type-C port.
The devicetree currently supports peripherals of:
- Etherne
Ezequiel Garcia writes:
> On Thu, 2018-07-26 at 15:13 +0800, d...@t-chip.com.cn wrote:
>> From: Levin Du
>>
>> ROC-RK3399-PC is a power efficient 4GB LPDDR4 single board
>> computer with USB 3.0 and Gigabit Ethernet in a form factor
>> compatible with the Raspberry Pi. It is based on the Rockch
From: Levin Du
ROC-RK3399-PC is a power efficient 4GB LPDDR4 single board
computer with USB 3.0 and Gigabit Ethernet in a form factor
compatible with the Raspberry Pi. It is based on the Rockchip
RK3399 SoC, powered by the Type-C port.
The devicetree currently supports peripherals of:
- Etherne
Enric Balletbo Serra writes:
> Hi Levin,
>
> Missatge de Heiko Stuebner del dia dt., 24 de jul.
> 2018 a les 11:29:
>>
>> Hi Levin,
>>
>> Am Samstag, 21. Juli 2018, 10:30:26 CEST schrieb d...@t-chip.com.cn:
>> > From: Levin Du
>> >
>> > ROC-RK3399-PC is the first power efficient 4GB DDR4 single
Hi Heiko,
Heiko Stuebner writes:
> Hi Levin,
>
> Am Samstag, 21. Juli 2018, 10:30:26 CEST schrieb d...@t-chip.com.cn:
>> From: Levin Du
>>
>> ROC-RK3399-PC is the first power efficient 4GB DDR4 single board
>
> maybe "is a power efficient" instead of "the first" ;-)
>
> [...]
>
ok :)
>> diff -
From: Levin Du
ROC-RK3399-PC is the first power efficient 4GB DDR4 single board
computer with USB 3.0 and Gigabit Ethernet in a form factor compatible
with the Raspberry Pi. It is based on the Rockchip RK3399 SoC, powered
by the Type-C port.
The devicetree currently supports peripherals of:
- E
Levin writes:
> Rob Herring writes:
>
>> On Sat, Jun 02, 2018 at 04:40:09PM +0800, Levin Du wrote:
>>>
>>> Rob Herring writes:
>>>
>>> > On Thu, May 31, 2018 at 9:05 PM, Levin wrote:
>>> > > Hi Rob,
>>> > >
>>> > >
>>> > > On 2018-05-31 10:45 PM, Rob Herring wrote:
>>> > > >
>>> > > > On
From: Levin Du
In roc-rk3328-cc board, the signal voltage of sdmmc is supplied by
the vcc_sdio regulator, which is a mux between 1.8V and 3.3V,
controlled by a special output only gpio pin labeled
"gpiomut_pmuio_iout", corresponding bit 1 of the syscon GRF_SOC_CON10.
This special pin can now be
From: Levin Du
Hi all, this is an attemp to add sdmmc UHS support to the
ROC-RK3328-CC board.
This patch series adds a new compatible `rockchip,rk3328-gpio-mute` to
the gpio-syscon driver for the access of the GPIO_MUTE pin in rk3328.
A new gpio controller named `gpio_mute` is defined in
rk332
From: Levin Du
It is necessary for the io domain setting of the SoC to match
the voltage supplied by the regulators.
Signed-off-by: Levin Du
---
Changes in v3: None
Changes in v2: None
Changes in v1:
- Split from V0.
arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 12
1 file c
From: Heiko Stuebner
Syscon nodes can be a simple-mfd and the syscon-users then be declared
as children of this node. That way the parent-child structure can be
better represented for devices that are fully embedded in the syscon.
Therefore allow getting the syscon from the parent if neither
a s
From: Levin Du
In Rockchip RK3328, the output only GPIO_MUTE pin, originally for codec
mute control, can also be used for general purpose. It is manipulated by
the GRF_SOC_CON10 register.
Signed-off-by: Levin Du
---
Changes in v3:
- Change from general gpio-syscon to specific rk3328-gpio-mute
From: Levin Du
Adding a new gpio controller named "gpio_mute" to rk3328, providing
access to the GPIO_MUTE pin, which is manupulated by the GRF_SOC_CON10
register.
The GPIO_MUTE pin is referred to as <&gpio_mute 0>.
Signed-off-by: Levin Du
---
Changes in v3:
- Use dedicated "rockchip,rk3328-
From: Levin Du
In roc-rk3328-cc board, the signal voltage of sdmmc is supplied by
the vcc_sdio regulator, which is a mux between 1.8V and 3.3V,
controlled by a special output only gpio pin labeled
"gpiomut_pmuio_iout", corresponding bit 1 of the syscon GRF_SOC_CON10.
This special pin can now be
From: Levin Du
Some GPIOs sit in the GRF_SOC_CON registers of Rockchip SoCs,
which do not belong to the general pinctrl.
Adding gpio-syscon support makes controlling regulator or
LED using these special pins very easy by reusing existing
drivers, such as gpio-regulator and led-gpio.
Signed-off-
From: Heiko Stuebner
Syscon nodes can be a simple-mfd and the syscon-users then be declared
as children of this node. That way the parent-child structure can be
better represented for devices that are fully embedded in the syscon.
Therefore allow getting the syscon from the parent if neither
a s
From: Levin Du
Adding a new gpio controller named "gpio-mute" to rk3328, providing
access to the GPIO_MUTE pin defined in the syscon GRF_SOC_CON10.
The GPIO_MUTE pin is referred to as <&gpio-mute 1>.
Signed-off-by: Levin Du
---
Changes in v2:
- Rename gpio_syscon10 to gpio_mute in rk3328.dts
From: Levin Du
It is necessary for the io domain setting of the SoC to match
the voltage supplied by the regulators.
Signed-off-by: Levin Du
---
Changes in v2: None
Changes in v1:
- Split from V0.
arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 12
1 file changed, 12 insertion
From: Levin Du
Hi all, this is an attemp to add sdmmc UHS support to the
ROC-RK3328-CC board.
This patch series adds a new compatible `rockchip,gpio-syscon` to
the gpio-syscon driver for general Rockchip SoC usage.
A new gpio controller named `gpio_mute` is defined in
rk3328.dtsi so that all r
From: Levin Du
In roc-rk3328-cc board, the signal voltage of sdmmc is supplied by
the vcc_sdio regulator, which is a mux between 1.8V and 3.3V,
controlled by a special output only gpio pin labeled
"gpiomut_pmuio_iout", corresponding bit 1 of the syscon GRF_SOC_CON10.
This special pin can now be
From: Levin Du
It is necessary for the io domain setting of the SoC to match
the voltage supplied by the regulators.
Signed-off-by: Levin Du
---
Changes in v1:
- Split from V0.
arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 12
1 file changed, 12 insertions(+)
diff --git a/a
From: Levin Du
Some GPIOs sit in the GRF_SOC_CON registers of Rockchip SoCs,
which do not belong to the general pinctrl.
Adding gpio-syscon support makes controlling regulator or
LED using these special pins very easy by reusing existing
drivers, such as gpio-regulator and led-gpio.
Signed-off-
From: Levin Du
It is necessary for the io domain setting of the SoC to match
the voltage supplied by the regulators.
Signed-off-by: Levin Du
---
Changes in v1:
- Split from V0.
arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 12
1 file changed, 12 insertions(+)
diff --git a/a
From: Levin Du
Adding a new gpio controller named "gpio-syscon10" to rk3328, providing
access to the pins defined in the syscon GRF_SOC_CON10.
Boards using these special pins to control regulators or LEDs, can now
utilize existing drivers like gpio-regulator and leds-gpio.
Signed-off-by: Levin
From: Heiko Stuebner
Syscon nodes can be a simple-mfd and the syscon-users then be declared
as children of this node. That way the parent-child structure can be
better represented for devices that are fully embedded in the syscon.
Therefore allow getting the syscon from the parent if neither
a s
From: Levin Du
Hi all, this is an attemp to add sdmmc UHS support to the
ROC-RK3328-CC board.
This patch series adds a new compatible `rockchip,gpio-syscon` to
the gpio-syscon driver for general Rockchip SoC usage..
A new gpio controller named `gpio_syscon10` is defined in
rk3328.dtsi so that a
From: Levin Du
In Rockchip RK3328 Soc, there's a output only gpio pin labeled
`gpiomut_pmuio_iout`, which can be set by bit[1] of GRF_SOC_CON10.
(bit[0] controls the enable state of the pin and defaults to enabled.)
This pin is used by the roc-rk3328-cc board to switch sdmmc io signal
voltage be
From: Levin Du
In roc-rk3328-cc board, the signal voltage of sdmmc is supplied by
the vcc_sdio regulator, which is a mux between 1.8V and 3.3V,
controlled by a special output only gpio pin.
However, this pin, not being a normal gpio in the rockchip pinctrl,
is set by bit 1 of system register GR
From: Levin Du
Hi all,
This is an attemp to add sdmmc UHS support to the ROC-RK3328-CC board.
It adds a new compatible `rockchip,rk3328-gpio-syscon10` to the gpio-syscon
driver, so that a new gpio controller named `gpio_syscon10` can be defined
and used in the regulator-gpio. This regulator co
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