[PATCH V3 4/4] ARM64 LPC: support earlycon for UART connected to LPC

From: "zhichang.yuan" This patch support the earlycon for UART connected to LPC on Hip06. This patch is depended on the LPC driver. Signed-off-by: zhichang.yuan --- drivers/bus/hisi_lpc.c | 113 +++ drivers/tty/serial/8250/8250_early.c | 26 ++

[PATCH V3 3/4] ARM64 LPC: support serial based on low-pin-count

<0x01 0x2f8 0x08>; + ret-names = "lpc_mem", "dev_io"; + status = "disabled"; + }; + }; diff --git a/drivers/tty/serial/8250/8250_hisi_lpc.c b/drivers/tty/serial/8250/8250_hisi_lpc.c new file mode 100644 in

[PATCH V3 2/4] ARM64 LPC: LPC driver implementation on Hip06

+= mvebu-mbus.o diff --git a/drivers/bus/hisi_lpc.c b/drivers/bus/hisi_lpc.c new file mode 100644 index 000..9b364d0 --- /dev/null +++ b/drivers/bus/hisi_lpc.c @@ -0,0 +1,653 @@ +/* + * Copyright (C) 2016 Hisilicon Limited, All Rights Reserved. + * Author: Zhichang Yuan + * Author: Zou Ron

[PATCH V3 1/4] ARM64 LPC: Indirect ISA port IO introduced

, count); + else +#endif + writesb(PCI_IOBASE + addr, buffer, count); +} + + /* * String version of I/O memory access operations. */ diff --git a/drivers/bus/extio.c b/drivers/bus/extio.c new file mode 100644 index 000..1e7a9c5 --- /dev/null +++ b/drivers/bus/extio.c @@ -

[PATCH V3 0/4] ARM64 LPC: legacy ISA I/O support

er in ISA compatible mode; - Reserve the IO range below 4K in avoid the possible conflict with PCI host IO ranges; - Support the LPC uart and relevant earlycon; Signed-off-by: Zhichang Yuan zhichang.yuan (4): ARM64 LPC: Indirect ISA port IO introduced ARM64 LPC: LPC driver implementation on H

[PATCH V2 0/4] ARM64 LPC: legacy ISA I/O support

he IO range below 4K in avoid the possible conflict with PCI host IO ranges; - Support the LPC uart and relevant earlycon; Signed-off-by: Zhichang Yuan zhichang.yuan (4): ARM64 LPC: Indirect ISA port IO introduced ARM64 LPC: LPC driver implementation on Hip06 ARM64 LPC: support ser

[PATCH V2 2/4] ARM64 LPC: LPC driver implementation on Hip06

_LPC)+= hisi_lpc.o obj-$(CONFIG_MIPS_CDMM)+= mips_cdmm.o obj-$(CONFIG_MVEBU_MBUS) += mvebu-mbus.o diff --git a/drivers/bus/hisi_lpc.c b/drivers/bus/hisi_lpc.c new file mode 100644 index 000..7ac0551 --- /dev/null +++ b/drivers/bus/hisi_lpc.c @@ -0,0 +1,496 @@ +/* + *

[PATCH V2 4/4] ARM64 LPC: support earlycon for UART connected to LPC

From: "zhichang.yuan" This patch support the earlycon for UART connected to LPC on Hip06. This patch is depended on the LPC driver. Signed-off-by: zhichang.yuan --- drivers/bus/hisi_lpc.c | 129 + 1 file changed, 129 insertions(+) diff --git a/d

[PATCH V2 1/4] ARM64 LPC: Indirect ISA port IO introduced

From: "zhichang.yuan" For arm64, there is no I/O space as other architectural platforms, such as X86. Most I/O accesses are achieved based on MMIO. But for some arm64 SoCs, such as Hip06, when accessing some legacy ISA devices connected to LPC, those known port addresses are explicitly used to co

[PATCH V2 3/4] ARM64 LPC: support serial based on low-pin-count

file mode 100644 index 000..fbaae89 --- /dev/null +++ b/drivers/tty/serial/8250/8250_hisi_lpc.c @@ -0,0 +1,104 @@ +/* + * Copyright (C) 2016 Hisilicon Limited, All Rights Reserved. + * Author: Zhichang Yuan + * Author: Zou Rongrong <@huawei.com> + * + * This program is free software; you

[PATCH v1] arm64:mm: enable the kernel execute attribute for HEAD_TEXT segment

y CPUs are booting based on spin-table mechanism, some functions in head.S are needed to run. Only PAGE_KERNEL dosen't work for this case. This patch will configure the page attributes as PAGE_KERNEL_EXEC for HEAD_TEXT segment. Signed-off-by: Zhichang Yuan --- arch/arm6

[PATCHv2] arm64:mm: free the useless initial page table

e is freed; Signed-off-by: Zhichang Yuan --- arch/arm64/include/asm/pgtable.h |3 +++ arch/arm64/mm/mmu.c | 15 --- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index 41a43b

[RFC PATCH v1] arm64:mm: An optimization about kernel direct sapce mapping

pped, then the second scanning will map the smaller memory ranges. Since the threshold is so small, in most cases, the second scanning is NULL operation. The patch is also accessible @ https://git.linaro.org/people/zhichang.yuan/pgalloc.git/shortlog/refs/heads/mapmem_linux_master Signed-off-by: Zhi