Hi guys,
> -Original Message-
> From: linux-arm-kernel On
> Behalf Of Mark Rutland
> Sent: Saturday, March 16, 2019 12:13 AM
> To: Okamoto, Takayuki/岡本 高幸
> Cc: 'Catalin Marinas' ; 'Will Deacon'
> ; 'linux-kernel@vger.kernel.org'
Hi James,
> -Original Message-
> From: linux-arm-kernel On
> Behalf Of James Morse
> Sent: Tuesday, February 26, 2019 2:29 AM
> To: Zhang, Lei/張 雷
> Cc: Mark Rutland ; 'Catalin Marinas'
> ; 'Will Deacon' ;
> 'linux-kernel@vger.kern
Hi guys,
> -Original Message-
> From: linux-arm-kernel On
> Behalf Of Zhang, Lei
> Sent: Friday, February 15, 2019 9:36 PM
> To: 'James Morse' ; Mark Rutland
>
> Cc: 'Catalin Marinas' ; 'Will Deacon'
> ; 'linux-kernel
Hi guys,
> -Original Message-
> From: James Morse [mailto:james.mo...@arm.com]
> Sent: Friday, February 15, 2019 3:23 AM
> To: Mark Rutland; Zhang, Lei
> Cc: 'Will Deacon'; 'Catalin Marinas'; 'linux-kernel@vger.kernel.org';
> 'linux-
including Armv8 and SVE might cause this undefined fault.
Since this erratum occurs only when TCR_ELx.NFD1=1,
I keep TCR_ELx.NFD1=0 during EL1/EL2.
By doing above, the erratum occurs only in EL0.
I deal with this erratum in EL0 by a new fault handler
which ignores this undefined fault.
Signed-off-by:
Hi Will,
> -Original Message-
> From: linux-arm-kernel
> [mailto:linux-arm-kernel-boun...@lists.infradead.org] On Behalf Of
> Will Deacon
> Sent: Friday, February 01, 2019 7:52 PM
> To: Zhang, Lei
> Cc: 'Mark Rutland'; 'Catalin Marinas'; '
Hi Catalin,
> -Original Message-
> From: Catalin Marinas [mailto:catalin.mari...@arm.com]
> Sent: Wednesday, January 30, 2019 3:11 AM
> To: Zhang, Lei
> Cc: 'linux-kernel@vger.kernel.org'; 'Mark Rutland';
> 'linux-arm-ker...@lists.infrade
Hi James,
> -Original Message-
> From: linux-arm-kernel
> [mailto:linux-arm-kernel-boun...@lists.infradead.org] On Behalf Of
> James Morse
> Sent: Thursday, January 31, 2019 12:00 AM
> To: Zhang, Lei/張 雷
> Cc: 'Mark Rutland'; 'Catalin Marinas'
Lx.NFD1 to 1 when exit kernel.
I fully appreciate that if someone can test this patch on different chips
to verity no harmful effect on other chips.
If there is no problem on other chips, please merge this patch.
The patch based on linux-5.0-rc2.
Zhang Lei (1):
Arm64: Add workaround for Fuji
Add workaround for Fujitsu A64FX erratum 010001
Signed-off-by: Zhang Lei
---
Documentation/arm64/silicon-errata.txt | 1 +
arch/arm64/Kconfig | 22 ++
arch/arm64/include/asm/cpucaps.h | 3 ++-
arch/arm64/include/asm/cputype.h | 4
arch
Hi Catalin,
> -Original Message-
> From: linux-arm-kernel
> [mailto:linux-arm-kernel-boun...@lists.infradead.org] On Behalf Of
> Catalin Marinas
> Sent: Saturday, January 26, 2019 3:08 AM
> To: Zhang, Lei/張 雷
> Cc: 'Mark Rutland'; 'will.dea...@arm.c
Hi, Mark, James
> -Original Message-
> From: linux-arm-kernel
> [mailto:linux-arm-kernel-boun...@lists.infradead.org] On Behalf Of
> Zhang, Lei
> Sent: Wednesday, January 23, 2019 9:51 PM
> To: 'Mark Rutland'; 'james.mo...@arm.com'
> Cc: '
Hi, Mark, James
> -Original Message-
> From: Mark Rutland [mailto:mark.rutl...@arm.com]
> Sent: Wednesday, January 23, 2019 12:24 AM
> To: Zhang, Lei/張 雷
> Cc: 'catalin.mari...@arm.com'; 'will.dea...@arm.com';
> 'linux-arm-ker...@lists.infr
I fully appreciate that if someone can test this patch on different chips
to verity no harmful effect on other chips.
If there is no problem on other chips, please merge this patch.
The patch based on linux-5.0-rc2.
Zhang Lei (1):
arm64: Add workaround for Fujitsu A64FX erratum 010001.
Docu
On some variants of the Fujitsu-A64FX cores ver(1.0, 1.1),
memory accesses may cause undefined fault (Data abort,
DFSC=0b11) due to the CPU Errata (Fujitsu #010001).
This patch introduces the workaround to the problem.
The workaround is to change the fault handler for Data abort
DFSC=0b11
Hi, Mark
Thanks for your comments, and sorry for late.
> -Original Message-
> * Under what conditions can the fault occur? e.g. is this in place of
> some other fault, or completely spurious?
This fault can occur completely spurious under
a specific hardware condition and instructions o
On some variants of the Fujitsu-A64FX cores ver(1.0, 1.1),
memory accesses may cause undefined fault (Data abort, DFSC=0b11).
This problem will be fixed by next version of Fujitsu-A64FX.
I would like to post a workaround to avoid this problem
on existing version.
The workaround is to replace
Hi Marc
> -Original Message-
> From: linux-arm-kernel
> [mailto:linux-arm-kernel-boun...@lists.infradead.org] On Behalf Of Marc
> Zyngier
> Sent: Saturday, September 22, 2018 5:00 AM
> To: linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org
> Cc: Jeffrey Hugo; Thomas Gleixne
ednesday, June 20, 2018 10:52 PM
> To: linux-kernel@vger.kernel.org
> Cc: Thomas Gleixner; Ard Biesheuvel; Shanker Donthineni; Shameer
> Kolothum; MaJun; Laurentiu Tudor; Zhang, Lei/張 雷
> Subject: [PATCH 0/7] irqchip/gic-v3: LPI allocation refactoring
>
> The GICv3 LPI allocat
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