Re: [PATCH v2] clk: sunxi: predivider handling for factors clock

Hello Wens, On Mon, Apr 25, 2016 at 10:51 PM, Chen-Yu Tsai wrote: > Hi, > > On Wed, Apr 20, 2016 at 12:47 AM, Vishnu Patekar > wrote: >> For A31 ahb1 and a83t ahb1 clocks have predivider for certain parent. >> To handle this, this patch adds predivider table with paren

[PATCH v2] sunxi factors clock predivider handling

be included in separate patch. v1->v2 Changes: 1. As 'kbuild test robot' reported build failure due to dependency on patches, Combined two patches in v1 into single patch. Vishnu Patekar (1): clk: sunxi: predivider handling for factors clock drivers/

[PATCH v2] clk: sunxi: predivider handling for factors clock

. Also, adds prediv table for a31. Signed-off-by: Vishnu Patekar --- drivers/clk/sunxi/clk-factors.c | 31 +++ drivers/clk/sunxi/clk-factors.h | 10 +- drivers/clk/sunxi/clk-sunxi.c | 31 +-- 3 files changed, 33 insertions(+), 39

Re: [PATCH 1/2] clk: sunxi: add predivider handling for factors clock

Hello Wens, On Tue, Apr 19, 2016 at 10:16 PM, Chen-Yu Tsai wrote: > On Tue, Apr 19, 2016 at 6:22 PM, Philip Li wrote: >> On Sun, Apr 17, 2016 at 11:53:47AM +0800, Vishnu Patekar wrote: >>> Both of these patches in series has to be applied at the same time. >>> I t

[PATCH 2/2] clk: sunxi: add prediv table for a31 ahb1 clock

For ahb1 clock, move mshift and mwidth to parent specific width and shift. getter differentiates parents with prediv, with non-zero prediv width. Also, removed unused ahb1 recalc function, it's now handled in generic factors recalc. Signed-off-by: Vishnu Patekar --- drivers/clk/sunx

[PATCH 1/2] clk: sunxi: add predivider handling for factors clock

. Signed-off-by: Vishnu Patekar --- drivers/clk/sunxi/clk-factors.c | 31 +++ drivers/clk/sunxi/clk-factors.h | 10 +- 2 files changed, 24 insertions(+), 17 deletions(-) diff --git a/drivers/clk/sunxi/clk-factors.c b/drivers/clk/sunxi/clk-factors.c index

[PATCH 0/2] sunxi factors clock predivider handling

c was currently used only by a31 ahb1. For getter, it differentiates parents with prediv, with non-zero prediv width. I've tested this patch on a83t bpi-m3 board. I do not have a31 device. a83t changes are not included in this patch, It'll be included in separate patch. Vishnu Patekar (2

Re: [PATCH v4 02/13] clk: sunxi: add ahb1 clock for A83T

Hello Maxime, On Fri, Apr 15, 2016 at 1:28 AM, Maxime Ripard wrote: > On Mon, Apr 04, 2016 at 11:07:29AM +0800, Vishnu Patekar wrote: >> Hello Maxime, >> >> On Thu, Mar 17, 2016 at 6:40 PM, Maxime Ripard >> wrote: >> > On Thu, Mar 17, 2016 at 12:04:25AM +08

Re: [PATCH v4 02/13] clk: sunxi: add ahb1 clock for A83T

Hello Maxime, On Thu, Mar 17, 2016 at 6:40 PM, Maxime Ripard wrote: > On Thu, Mar 17, 2016 at 12:04:25AM +0800, Vishnu Patekar wrote: >> AHB1 on A83T is similar to ahb1 on A31, except parents are different. >> clock index 0b1x is PLL6. >> >> Signed-off-by: Vishnu Pa

[PATCH v4 03/13] clk: sunxi: Add APB1 clock for A83T

APB1 is similar to sun4i-a10-apb0-clk, except different dividers. This adds support for apb1 on A83T. Signed-off-by: Vishnu Patekar Acked-by: Rob Herring --- Documentation/devicetree/bindings/clock/sunxi.txt | 1 + drivers/clk/sunxi/clk-sunxi.c | 13 + 2 files

[PATCH v4 10/13] ARM: dts: sun8i-a83t: add mmc0 CD pin

A83T Boards BPI-m3 and Allwinner H8Homletv2 boards use PF6 as Card Detect pin., so use PF6 as reference design CD pin in dtsi. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch

[PATCH v4 12/13] ARM: dts: sun8i: Add A83T based Sinovoip Bpi-M3 Board

This patch adds support for Sinovoip BPI-M3 A83T based board. It has 2G LPDDR3, UART, ethernet, USB, HDMI, USB Sata, MIPI DSI, mic, AP6212 Wifi, etc on it. It is paired with AXP813 PMIC which is almost same as AXP818. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/Makefile

[PATCH v4 01/13] pinctrl: sunxi: Add A83T R_PIO controller

The A83T has R_PIO pin controller, it's same as A23, execpt A83T interrupt bit is 6th and A83T has one extra pin PL12. Signed-off-by: Vishnu Patekar Acked-by: Chen-Yu Tsai Acked-by: Rob Herring --- .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 + drivers/pinctrl/sunxi/Kc

[PATCH v4 04/13] ARM: dts: sun8i-a83t: Add basic clocks and resets

This adds A83T system bus clocks, bus gates, and clock resets. Three ahb reset registers are combined into one node. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 114 +- 1 file changed, 112 insertions(+), 2 deletions(-) diff --git a

[PATCH v4 06/13] ARM: dts: sun8i-a83t: Add mmc controller nodes

A83T mmc is compatible with earliers sunxi socs. This adds mmc0, mmc1, and mmc2 controller nodes for A83T. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 57 +++ 1 file changed, 57 insertions(+) diff --git a/arch/arm/boot/dts/sun8i

[PATCH v4 08/13] ARM: dts: sun8i-a83t: Add R_PIO controller node to the dtsi

Now that we have a driver for the R_PIO controller, add the corresponding device node to the dtsi. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 12 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i

[PATCH v4 02/13] clk: sunxi: add ahb1 clock for A83T

AHB1 on A83T is similar to ahb1 on A31, except parents are different. clock index 0b1x is PLL6. Signed-off-by: Vishnu Patekar Acked-by: Chen-Yu Tsai Acked-by: Rob Herring --- Documentation/devicetree/bindings/clock/sunxi.txt | 1 + drivers/clk/sunxi/clk-sunxi.c | 76

[PATCH v4 13/13] ARM: sunxi: Add Kconfig for sunxi clocks

This patch adds Kconfig for sunxi clocks. Currently, only sun8i-apb0 and sun9i-cpus clocks are added. It'll help to use common clocks across different SOCs. We can switch to kconfig for other clocks in future. Signed-off-by: Vishnu Patekar --- drivers/clk/Kconfig| 1 + drivers/clk/

[PATCH v4 09/13] ARM: dts: sun8i-a83t: Add RSB controller device node to dtsi

This patch adds a device node for the Reduced Serial Bus (RSB) controller and the defacto pinmux setting to the A83T dtsi. Since there is only one possible pinmux setting for RSB, just set it in the dtsi. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 21

[PATCH v4 11/13] ARM: dts: sun8i: enable mmc for H8Homlet Board.

This enables mmc0. Signed-off-by: Vishnu Patekar Tested-by: LABBE Corentin --- arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts b/arch/arm/boot/dts/sun8i-a83t

[PATCH v4 05/13] ARM: dts: sun8i-a83t: add mmc clock nodes

mmc clocks are compatible with that of earlier sun8i socs. This adds mmc0, mmc1, and mmc2 clock nodes for A83T. Signed-off-by: Vishnu Patekar Acked-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun8i-a83t.dtsi | 30 ++ 1 file changed, 30 insertions(+) diff --git a/arch

Re: [PATCH v4 01/13] pinctrl: sunxi: Add A83T R_PIO controller

Hello Linus, On Thu, Mar 17, 2016 at 10:51 PM, Linus Walleij wrote: > On Wed, Mar 16, 2016 at 5:04 PM, Vishnu Patekar > wrote: > >> The A83T has R_PIO pin controller, it's same as A23, execpt A83T >> interrupt bit is 6th and A83T has one extra pin PL12. >>

[PATCH v4 07/13] ARM: dts: sun8i-a83t: Add PRCM related clocks and resets

This adds A83T PRCM related clocks, clock resets. As a83t apb0 gates clock support is added earlier, this enables it. Apart from apb0 gates, other added clocks are compatible with earlier sun8i socs. Signed-off-by: Vishnu Patekar Acked-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun8i-a83t.dtsi

[PATCH v4 00/13] Add A83T clk, r_pio, mmc rsb support

detect pin as reference design pin patch 11: enables mmc0 support for h8homlet board, tested by LABBE Corentin. patch 12: This patch adds support for Sinovoip BPI-M3 A83T based board, it has 2GB LPDDR3, u-boot support is added recently for this board. patch 13: Adds kconfig for clocks(sun8i-apb0 an

Re: [PATCH v3 01/13] pinctrl: sunxi: Add A83T R_PIO controller support

Hello Linus, On Wed, Mar 9, 2016 at 10:55 AM, Linus Walleij wrote: > On Sat, Mar 5, 2016 at 10:42 PM, Vishnu Patekar > wrote: > >> The A83T has R_PIO pin controller, it's same as A23, execpt A83T >> interrupt bit is 6th and A83T has one extra pin PL12. >>

Re: [PATCH v3 13/13] ARM: sunxi: Add Kconfig for sunxi clocks

Hello, On Sat, Mar 5, 2016 at 11:43 PM, Vishnu Patekar wrote: > This patch adds Kconfig for sunxi clocks. > Currently, only sun8i-apb0 and sun9i-cpus clocks are added. > It'll help to use common clocks across different SOCs. > We can switch to kconfig for other clocks in futur

[PATCH v3 06/13] ARM: dts: sun8i-a83t: Add mmc controller nodes

A83T mmc is compatible with earliers sunxi socs. This adds mmc0, mmc1, and mmc2 controller nodes for A83T. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 57 +++ 1 file changed, 57 insertions(+) diff --git a/arch/arm/boot/dts/sun8i

[PATCH v3 10/13] ARM: dts: sun8i-a83t: add mmc0 CD pin

A83T Boards BPI-m3 and Allwinner H8Homletv2 boards use PF6 as Card Detect pin., so use PF6 as reference design CD pin in dtsi. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch

[PATCH v3 09/13] ARM: dts: sun8i-a83t: Add RSB controller device node to dtsi

This patch adds a device node for the Reduced Serial Bus (RSB) controller and the defacto pinmux setting to the A83T dtsi. Since there is only one possible pinmux setting for RSB, just set it in the dtsi. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 21

[PATCH v3 11/13] ARM: dts: sun8i: enable mmc for H8Homlet Board.

This enables mmc0. Signed-off-by: Vishnu Patekar Tested-by: LABBE Corentin --- arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts b/arch/arm/boot/dts/sun8i-a83t

[PATCH v3 07/13] ARM: dts: sun8i-a83t: Add PRCM related clocks and resets

This adds A83T PRCM related clocks, clock resets. As a83t apb0 gates clock support is added earlier, this enables it. Apart from apb0 gates, other added clocks are compatible with earlier sun8i socs. Signed-off-by: Vishnu Patekar Acked-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun8i-a83t.dtsi

[PATCH v3 12/13] ARM: dts: sun8i: Add A83T based Sinovoip Bpi-M3 Board

This patch adds support for Sinovoip BPI-M3 A83T based board. It has 2G LPDDR3, UART, ethernet, USB, HDMI, USB Sata, MIPI DSI, mic, AP6212 Wifi, etc on it. It is paired with AXP813 PMIC which is almost same as AXP818. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/Makefile

[PATCH v3 08/13] ARM: dts: sun8i-a83t: Add R_PIO controller node to the dtsi

Now that we have a driver for the R_PIO controller, add the corresponding device node to the dtsi. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 12 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i

[PATCH v3 13/13] ARM: sunxi: Add Kconfig for sunxi clocks

This patch adds Kconfig for sunxi clocks. Currently, only sun8i-apb0 and sun9i-cpus clocks are added. It'll help to use common clocks across different SOCs. We can switch to kconfig for other clocks in future. Signed-off-by: Vishnu Patekar --- drivers/clk/Kconfig| 1 + drivers/clk/

[PATCH v3 03/13] clk: sunxi: Add APB1 clock for A83T

APB1 is similar to sun4i-a10-apb0-clk, except different dividers. This adds support for apb1 on A83T. Signed-off-by: Vishnu Patekar Acked-by: Rob Herring --- Documentation/devicetree/bindings/clock/sunxi.txt | 1 + drivers/clk/sunxi/clk-sunxi.c | 13 + 2 files

[PATCH v3 04/13] ARM: dts: sun8i-a83t: Add basic clocks and resets

This adds A83T system bus clocks, bus gates, and clock resets. Three ahb reset registers are combined into one node. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 114 +- 1 file changed, 112 insertions(+), 2 deletions(-) diff --git a

[PATCH v3 05/13] ARM: dts: sun8i-a83t: add mmc clock nodes

mmc clocks are compatible with that of earlier sun8i socs. This adds mmc0, mmc1, and mmc2 clock nodes for A83T. Signed-off-by: Vishnu Patekar Acked-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun8i-a83t.dtsi | 30 ++ 1 file changed, 30 insertions(+) diff --git a/arch

[PATCH v3 02/13] clk: sunxi: add ahb1 clock for A83T

AHB1 on A83T is similar to ahb1 on A31, except parents are different. clock index 0b1x is PLL6. Signed-off-by: Vishnu Patekar Acked-by: Chen-Yu Tsai Acked-by: Rob Herring --- Documentation/devicetree/bindings/clock/sunxi.txt | 1 + drivers/clk/sunxi/clk-sunxi.c | 76

[PATCH v3 01/13] pinctrl: sunxi: Add A83T R_PIO controller support

The A83T has R_PIO pin controller, it's same as A23, execpt A83T interrupt bit is 6th and A83T has one extra pin PL12. Signed-off-by: Vishnu Patekar Acked-by: Chen-Yu Tsai Acked-by: Rob Herring --- .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 + drivers/pinctrl/sunxi/Kc

[PATCH v3 00/13] Add A83T clk, r_pio, mmc rsb support

-boot support is added recently for this board. patch 13: Adds kconfig for clocks(sun8i-apb0 and sun9i-cpus). Vishnu Patekar (13): pinctrl: sunxi: Add A83T R_PIO controller support clk: sunxi: add ahb1 clock for A83T clk: sunxi: Add APB1 clock for A83T ARM: dts: sun8i-a83t: Add basic cloc

Re: [PATCH v2 13/13] ARM: sunxi: Introduce MACH_SUN8I_A83T option

Hello Maxime, On Tue, Mar 1, 2016 at 3:12 PM, Maxime Ripard wrote: > Hi, > > On Sun, Feb 28, 2016 at 11:18:58PM +0800, Vishnu Patekar wrote: >> A83T has CPUS clock similar to A80's. currently, a80 cpus clock only >> compiled for A80. So, Introduce MACH_SUN8I_A83T to

Re: [PATCH v2 04/13] ARM: dts: sun8i-a83t: Add basic clocks and resets

Hello Wens, On Mon, Feb 29, 2016 at 1:29 AM, Chen-Yu Tsai wrote: > On Sun, Feb 28, 2016 at 7:18 AM, Vishnu Patekar > wrote: >> This adds A83T system bus clocks, bus gates, and clock resets. >> >> Three ahb reset registers are combined into one node. >> &g

[PATCH v2 13/13] ARM: sunxi: Introduce MACH_SUN8I_A83T option

A83T has CPUS clock similar to A80's. currently, a80 cpus clock only compiled for A80. So, Introduce MACH_SUN8I_A83T to compile it for A83T as well. Signed-off-by: Vishnu Patekar --- arch/arm/mach-sunxi/Kconfig | 5 + drivers/clk/sunxi/Makefile | 3 +++ 2 files changed, 8 inser

[PATCH v2 10/13] ARM: dts: sun8i-a83t: add mmc0 CD pin

A83T Boards BPI-m3 and Allwinner H8Homletv2 boards use PF6 as Card Detect pin., so use PF6 as reference design CD pin in dtsi. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch

[PATCH v2 07/13] ARM: dts: sun8i-a83t: Add PRCM related clocks and resets

This adds A83T PRCM related clocks, clock resets. As a83t apb0 gates clock support is added earlier, this enables it. Apart from apb0 gates, other added clocks are compatible with earlier sun8i socs. Signed-off-by: Vishnu Patekar Acked-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun8i-a83t.dtsi

[PATCH v2 06/13] ARM: dts: sun8i-a83t: Add mmc controller nodes

A83T mmc is compatible with earliers sunxi socs. This adds mmc0, mmc1, and mmc2 controller nodes for A83T. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 57 +++ 1 file changed, 57 insertions(+) diff --git a/arch/arm/boot/dts/sun8i

[PATCH v2 08/13] ARM: dts: sun8i-a83t: Add R_PIO controller node to the dtsi

Now that we have a driver for the R_PIO controller, add the corresponding device node to the dtsi. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 12 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i

[PATCH v2 09/13] ARM: dts: sun8i-a83t: Add RSB controller device node to dtsi

This patch adds a device node for the Reduced Serial Bus (RSB) controller and the defacto pinmux setting to the A83T dtsi. Since there is only one possible pinmux setting for RSB, just set it in the dtsi. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 21

[PATCH v2 12/13] ARM: dts: sun8i: Add A83T based Sinovoip Bpi-M3 Board

This patch adds support for Sinovoip BPI-M3 A83T based board. It has 2G LPDDR3, UART, ethernet, USB, HDMI, USB Sata, MIPI DSI, mic, AP6212 Wifi, etc on it. It is paired with AXP813 PMIC which is almost same as AXP818. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/Makefile

[PATCH v2 11/13] ARM: dts: sun8i: enable mmc for H8Homlet Board.

This enables mmc0. Signed-off-by: Vishnu Patekar Tested-by: LABBE Corentin --- arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts b/arch/arm/boot/dts/sun8i-a83t

[PATCH v2 02/13] clk: sunxi: add ahb1 clock for A83T

AHB1 on A83T is similar to ahb1 on A31, except parents are different. clock index 0b1x is PLL6. Signed-off-by: Vishnu Patekar Acked-by: Chen-Yu Tsai Acked-by: Rob Herring --- Documentation/devicetree/bindings/clock/sunxi.txt | 1 + drivers/clk/sunxi/clk-sunxi.c | 76

[PATCH v2 05/13] ARM: dts: sun8i-a83t: add mmc clock nodes

mmc clocks are compatible with that of earlier sun8i socs. This adds mmc0, mmc1, and mmc2 clock nodes for A83T. Signed-off-by: Vishnu Patekar Acked-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun8i-a83t.dtsi | 30 ++ 1 file changed, 30 insertions(+) diff --git a/arch

[PATCH v2 04/13] ARM: dts: sun8i-a83t: Add basic clocks and resets

This adds A83T system bus clocks, bus gates, and clock resets. Three ahb reset registers are combined into one node. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 114 +- 1 file changed, 112 insertions(+), 2 deletions(-) diff --git a

[PATCH v2 03/13] clk: sunxi: Add APB1 clock for A83T

APB1 is similar to sun4i-a10-apb0-clk, except different dividers. This adds support for apb1 on A83T. Signed-off-by: Vishnu Patekar Acked-by: Rob Herring --- Documentation/devicetree/bindings/clock/sunxi.txt | 1 + drivers/clk/sunxi/clk-sunxi.c | 13 + 2 files

[PATCH v2 01/13] pinctrl: sunxi: Add A83T R_PIO controller support

The A83T has R_PIO pin controller, it's same as A23, execpt A83T interrupt bit is 6th and A83T has one extra pin PL12. Signed-off-by: Vishnu Patekar Acked-by: Chen-Yu Tsai Acked-by: Rob Herring --- .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 + drivers/pinctrl/sunxi/Kc

[PATCH v2 00/13] Add A83T clk, r_pio, mmc rsb support

2: This patch adds support for Sinovoip BPI-M3 A83T based board, it has 2GB LPDDR3, u-boot support is added recently for this board. patch 13: Introduce MACH_SUN8I_A83T config option. Vishnu Patekar (13): pinctrl: sunxi: Add A83T R_PIO controller support clk: sunxi: add ahb1 clock for A83T cl

Re: [PATCH 10/14] ARM: dts: sun8i-a83t: Add PRCM related clocks and resets

Hello Wens, On Tue, Feb 2, 2016 at 2:44 PM, Chen-Yu Tsai wrote: > On Sun, Jan 31, 2016 at 9:21 AM, Vishnu Patekar > wrote: >> This adds A83T PRCM related clocks, clock resets. >> >> As a83t apb0 gates clock support is added earlier, this enables it. >> Apart from

Re: [PATCH 04/14] clk: sunxi: add ahb1 clock for A83T

Hello Maxime, On Thu, Feb 4, 2016 at 4:01 PM, Maxime Ripard wrote: > On Thu, Feb 04, 2016 at 02:06:45PM +0800, Vishnu Patekar wrote: >> Hello Maxime, >> >> >> On Tue, Feb 2, 2016 at 9:17 PM, Maxime Ripard >> wrote: >> > Hi, >> > >> &

Re: [PATCH 06/14] ARM: dts: sun8i-a83t: Correct low speed oscillator clocks

Hello Maxime, On Tue, Feb 2, 2016 at 9:19 PM, Maxime Ripard wrote: > On Sun, Jan 31, 2016 at 09:20:58AM +0800, Vishnu Patekar wrote: >> From: Chen-Yu Tsai >> >> The A83T does not have a 32.768 kHz low speed oscillator, either as >> an external crystal or inpu

Re: [PATCH 04/14] clk: sunxi: add ahb1 clock for A83T

Hello Maxime, On Tue, Feb 2, 2016 at 9:17 PM, Maxime Ripard wrote: > Hi, > > On Sun, Jan 31, 2016 at 09:20:56AM +0800, Vishnu Patekar wrote: >> AHB1 on A83T is similar to ahb1 on A31, except parents are different. >> clock index 0b1x is PLL6. >> >> Signed-o

Re: [PATCH 14/14] ARM: dts: sun8i: Add A83T based Sinovoip Bpi-M3 Board

Hello Wens, On Tue, Feb 2, 2016 at 3:37 PM, Chen-Yu Tsai wrote: > > On Sun, Jan 31, 2016 at 9:21 AM, Vishnu Patekar > wrote: > > This patch adds support for Sinovoip BPI-M3 A83T based board. > > > > It has 2G LPDDR3, UART, ethernet, USB, HDMI, USB Sata, MIPI DSI, &

[PATCH 02/14] clk: sunxi: Add apb0 gates for A83T

APB0 is part of PRCM, and is compatible with earlier SOCs. apb0 gates controls R_PIO, R_UART, R_RSB, etc clocks. This patch adds support for APB0 gates for A83T. Signed-off-by: Vishnu Patekar --- Documentation/devicetree/bindings/clock/sunxi.txt | 1 + drivers/clk/sunxi/clk-simple-gates.c

[PATCH 09/14] ARM: dts: sun8i-a83t: Add mmc controller nodes

A83T mmc is compatible with earliers sunxi socs. This adds mmc0, mmc1, and mmc2 controller nodes for A83T. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 57 +++ 1 file changed, 57 insertions(+) diff --git a/arch/arm/boot/dts/sun8i

[PATCH 11/14] ARM: dts: sun8i-a83t: Add R_PIO controller node to the dtsi

Now that we have a driver for the R_PIO controller, add the corresponding device node to the dtsi. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 21 + 1 file changed, 21 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot

[PATCH 13/14] ARM: dts: sun8i: enable mmc for H8Homlet Board.

This enables mmc0. Signed-off-by: Vishnu Patekar Tested-by: LABBE Corentin --- .../boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts| 20 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts b/arch/arm/boot/dts/sun8i-a83t

[PATCH 14/14] ARM: dts: sun8i: Add A83T based Sinovoip Bpi-M3 Board

This patch adds support for Sinovoip BPI-M3 A83T based board. It has 2G LPDDR3, UART, ethernet, USB, HDMI, USB Sata, MIPI DSI, mic, AP6212 Wifi, etc on it. It is paired with AXP813 PMIC which is almost same as AXP818. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/Makefile

[PATCH 08/14] ARM: dts: sun8i-a83t: add mmc clock nodes

mmc clocks are compatible with that of earlier sun8i socs. This adds mmc0, mmc1, and mmc2 clock nodes for A83T. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 30 ++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/sun8i

[PATCH 04/14] clk: sunxi: add ahb1 clock for A83T

AHB1 on A83T is similar to ahb1 on A31, except parents are different. clock index 0b1x is PLL6. Signed-off-by: Vishnu Patekar --- Documentation/devicetree/bindings/clock/sunxi.txt | 1 + drivers/clk/sunxi/clk-sunxi.c | 75 +++ 2 files changed, 76

[PATCH 06/14] ARM: dts: sun8i-a83t: Correct low speed oscillator clocks

From: Chen-Yu Tsai The A83T does not have a 32.768 kHz low speed oscillator, either as an external crystal or input. It has a 16 MHz RC-based (inaccurate) internal oscillator, which is then divided by 512 for a clock close to 32 kHz. Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun8i-a83t

[PATCH 03/14] clk: sunxi: add bus gates for A83T

ci1) => AHB1 for H3 bits 29, 30, 31(ohci0,1,2) => AHB2 for H3. until, this confusion is cleared keep it H3 way. Signed-off-by: Vishnu Patekar --- Documentation/devicetree/bindings/clock/sunxi.txt | 1 + drivers/clk/sunxi/clk-sun8i-bus-gates.c | 2 ++ 2 files changed, 3 insertions

[PATCH 05/14] clk: sunxi: Add APB1 clock for A83T

APB1 is similar to sun4i-a10-apb0-clk, except different dividers. This adds support for apb1 on A83T. Signed-off-by: Vishnu Patekar --- Documentation/devicetree/bindings/clock/sunxi.txt | 1 + drivers/clk/sunxi/clk-sunxi.c | 17 + 2 files changed, 18

[PATCH 10/14] ARM: dts: sun8i-a83t: Add PRCM related clocks and resets

This adds A83T PRCM related clocks, clock resets. As a83t apb0 gates clock support is added earlier, this enables it. Apart from apb0 gates, other added clocks are compatible with earlier sun8i socs. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 44

[PATCH 07/14] ARM: dts: sun8i-a83t: Add basic clocks and resets

This adds A83T system bus clocks, bus gates, and clock resets. For ahb1 and ahb2, it's not clear which reset belongs to ahb1 or ahb2; so named as ahb_reset0, ahb_reset1, ahb_reset2. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi

[PATCH 12/14] ARM: dts: sun8i-a83t: Add RSB nodes to dtsi

This adds support for RSB A83T RSB is compatible with A23 rsb. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 11be9e1..8c67c85

[PATCH 00/14] Add A83T clk, r_pio, mmc rsb support

8i-a83t: Correct low speed oscillator clocks Vishnu Patekar (13): pinctrl: sunxi: Add A83T R_PIO controller support clk: sunxi: Add apb0 gates for A83T clk: sunxi: add bus gates for A83T clk: sunxi: add ahb1 clock for A83T clk: sunxi: Add APB1 clock for A83T ARM: dts: sun8i-a83t: Add bas

[PATCH 01/14] pinctrl: sunxi: Add A83T R_PIO controller support

The A83T has R_PIO pin controller, it's same as A23, execpt A83T interrupt bit is 6th and A83T has one extra pin PL12. Signed-off-by: Vishnu Patekar --- .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 + drivers/pinctrl/sunxi/Kconfig | 5 + drivers/pinctrl/

[PATCH v4 2/3] ARM: dts: sun8i: Add Allwinner A83T dtsi

Allwinner A83T is new octa-core cortex-a7 SOC. This adds the basic dtsi, the clocks differs from earlier sun8i SOCs. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 204 ++ 1 file changed, 204 insertions(+) create mode 100644 arch/arm

[PATCH v4 1/3] ARM: sunxi: Introduce Allwinner for A83T support

Allwinner A83T is octa-core cortex-a7 based SoC. It's clock control unit and prcm, pinmux are different from previous sun8i series. Its processor cores are arragned in two clusters 4 cores each, similar to A80. Signed-off-by: Vishnu Patekar Acked-by: Rob Herring Acked-by: Chen-Yu

[PATCH v4 0/3] Add basic support for Allwinner A83T SOC

al order. 4. arrnaged compatible in alphabatical order. 5. changed cpu nodes to use cpu@100 -cpu@-103. 6. changed dts filename. Vishnu Patekar (3): ARM: sunxi: Introduce Allwinner for A83T support ARM: dts: sun8i: Add Allwinner A83T dtsi ARM: dts: sun8i: Add A83T HomletV2 Board by Allwinn

[PATCH v4 3/3] ARM: dts: sun8i: Add A83T HomletV2 Board by Allwinner

and PF4. Enabled UART0 Header(PB9, PB10 pins). Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/Makefile | 1 + .../boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 64 ++ 2 files changed, 65 insertions(+) create mode 100644 arch/arm/boot/dts

Re: [linux-sunxi] Re: [PATCH v3 2/3] ARM: dts: sun8i: Add Allwinner A83T dtsi

Hello Wens, On Tue, Dec 22, 2015 at 11:12 AM, Chen-Yu Tsai wrote: > On Sat, Dec 19, 2015 at 5:41 AM, Maxime Ripard > wrote: >> Hi, >> >> On Fri, Dec 18, 2015 at 09:30:50PM +0800, Vishnu Patekar wrote: >>> Allwinner A83T is new octa-core cortex-a7 SOC. >>

Re: [PATCH v3 2/3] ARM: dts: sun8i: Add Allwinner A83T dtsi

Hello Maxime, On Sat, Dec 19, 2015 at 5:41 AM, Maxime Ripard wrote: > Hi, > > On Fri, Dec 18, 2015 at 09:30:50PM +0800, Vishnu Patekar wrote: >> Allwinner A83T is new octa-core cortex-a7 SOC. >> This adds the basic dtsi, the clocks differs from >> earlier sun8i SOCs.

[PATCH v3 1/3] ARM: sunxi: Introduce Allwinner for A83T support

Allwinner A83T is octa-core cortex-a7 based SoC. It's clock control unit and prcm, pinmux are different from previous sun8i series. Its processor cores are arragned in two clusters 4 cores each, similar to A80. Signed-off-by: Vishnu Patekar --- Documentation/arm/sunxi/R

[PATCH v3 2/3] ARM: dts: sun8i: Add Allwinner A83T dtsi

Allwinner A83T is new octa-core cortex-a7 SOC. This adds the basic dtsi, the clocks differs from earlier sun8i SOCs. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 206 ++ 1 file changed, 206 insertions(+) create mode 100644 arch/arm

[PATCH v3 3/3] ARM: dts: sun8i: Add A83T HomletV2 Board by Allwinner

and PF4. Enabled UART0 Header(PB9, PB10 pins). Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/Makefile | 1 + .../boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 64 ++ 2 files changed, 65 insertions(+) create mode 100644 arch/arm/boot/dts

[PATCH v3 0/3] Add basic support for Allwinner A83T SOC

es in alphabatical order. 4. arrnaged compatible in alphabatical order. 5. changed cpu nodes to use cpu@100 -cpu@-103. 6. changed dts filename. Vishnu Patekar (3): ARM: sunxi: Introduce Allwinner for A83T support ARM: dts: sun8i: Add Allwinner A83T dtsi ARM: dts: sun8i: Add A83T HomletV2 Board b

Re: [PATCH v2 2/3] ARM: dts: sun8i: Add Allwinner A83T dtsi

Hello Maxime, Sorry for delayed response. On Mon, Oct 26, 2015 at 4:20 AM, Maxime Ripard wrote: > Hi, > > On Fri, Oct 23, 2015 at 07:46:16AM +0800, Vishnu Patekar wrote: >> + memory { >> + reg = <0x4000 0x8000>; >

Re: [PATCH v2 1/3] ARM: sunxi: Introduce Allwinner for A83T support

Hello, Sorry for delayed response. On Fri, Oct 23, 2015 at 9:37 AM, Chen-Yu Tsai wrote: > On Fri, Oct 23, 2015 at 7:46 AM, Vishnu Patekar > wrote: >> Allwinner A83T is octa-core cortex-a7 based SoC. >> It's clock control unit and prcm, pinmux are different from previous

[PATCH v2 3/3] ARM: dts: sun8i: Add A83T HomletV2 Board by Allwinner

and PF4. Enabled UART0 Header(PB9, PB10 pins). Signed-off-by: Vishnu Patekar --- .../boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 64 ++ 1 file changed, 64 insertions(+) create mode 100644 arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts diff --git a/arch/arm/boot

[PATCH v2 2/3] ARM: dts: sun8i: Add Allwinner A83T dtsi

Allwinner A83T is new octa-core cortex-a7 SOC. This adds the basic dtsi, the clocks differs from earlier sun8i SOCs. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 247 ++ 1 file changed, 247 insertions(+) create mode 100644 arch/arm

[PATCH v2 1/3] ARM: sunxi: Introduce Allwinner for A83T support

Allwinner A83T is octa-core cortex-a7 based SoC. It's clock control unit and prcm, pinmux are different from previous sun8i series. Its processor cores are arragned in two clusters 4 cores each, similar to A80. Signed-off-by: Vishnu Patekar --- Documentation/devicetree/bindings/arm/sunx

[PATCH v2 0/3] Add basic support for Allwinner A83T SOC

arrnaged compatible in alphabatical order. 5. changed cpu nodes to use cpu@100 -cpu@-103. 6. changed dts filename. Vishnu Patekar (3): ARM: sunxi: Introduce Allwinner for A83T support ARM: dts: sun8i: Add Allwinner A83T dtsi ARM: dts: sun8i: Add A83T HomletV2 Board by Allwinner Documentation/de

Re: [PATCH 1/4] ARM: sunxi: Introduce Allwinner for A83T support

Hello, On Tue, Sep 22, 2015 at 11:51 PM, Maxime Ripard wrote: > Hi, > > On Tue, Sep 22, 2015 at 11:38:54PM +0800, Vishnu Patekar wrote: >> Allwinner A83T is octa-core cortex-a7 based SoC. >> It's clock control unit and prcm, pinmux are different from previous sun8i &

Re: [PATCH 1/4] ARM: sunxi: Introduce Allwinner for A83T support

Hello, On Tue, Sep 22, 2015 at 11:47 PM, Chen-Yu Tsai wrote: > On Tue, Sep 22, 2015 at 11:38 PM, Vishnu Patekar > wrote: >> Allwinner A83T is octa-core cortex-a7 based SoC. >> It's clock control unit and prcm, pinmux are different from previous sun8i >> serie

Re: [PATCH 4/4] ARM: dts: sun8i: Add A83T HomletV2 Board by Allwinner

Hello, On Wed, Sep 23, 2015 at 12:00 AM, Maxime Ripard wrote: > > On Tue, Sep 22, 2015 at 11:38:57PM +0800, Vishnu Patekar wrote: > > H8Homlet Proto v2.0 Board is A83T Dev Board by Allwinner. > > It has UART, ethernet, USB, HDMI, etc ports on it. > > > > It'

[PATCH 2/4] pinctrl: sunxi: add allwinner A83T PIO controller support

Allwinner A83T soc port controller has 8 ports. It has 3 IRQ banks namely PB, PG, PH. Pinmuxing are different for some pins as compared to sun8i A23 and A33. Signed-off-by: Vishnu Patekar --- .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 + drivers/pinctrl/sunxi/Kconfig

[PATCH 4/4] ARM: dts: sun8i: Add A83T HomletV2 Board by Allwinner

on it. For FEL mode it needs USB A-A(Male) cable. I used uart0 which is multiplexed to microsd pins PF2 and PF4. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/Makefile | 5 +- .../boot/dts/sun8i-a83t-allwinner-homlet-v20.dts | 69 ++ 2 fi

[PATCH 1/4] ARM: sunxi: Introduce Allwinner for A83T support

Allwinner A83T is octa-core cortex-a7 based SoC. It's clock control unit and prcm, pinmux are different from previous sun8i series. Its processor cores are arragned in two clusters 4 cores each, similar to A80. Signed-off-by: Vishnu Patekar --- Documentation/devicetree/bindings/arm/sunx

[PATCH 3/4] ARM: dts: sun8i: Add Allwinner A83T dtsi

Allwinner A83T is new octa-core cortex-a7 SOC. This adds the basic dtsi, the clocks differs from earlier sun8i SOCs. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 243 ++ 1 file changed, 243 insertions(+) create mode 100644 arch/arm

[PATCH 0/4] Add basic support for Allwinner A83T SOC

n two clusters 4 cores each, similar to A80. Patch1 This adds compatibe string for A83T Patch2 adds PIO controller support R_PIO is yet to be added. Patch3 adds basic dtsi Patch4 Adds Alllwinner A83T Homletv2 board dts. Vishnu Patekar (4): ARM: sunxi: Introduce Allwinner for A83T support pinctrl:

  1   2   >