On Thu, Jul 2, 2020 at 2:48 AM Pierre-Louis Bossart
wrote:
>
> 0day/kbuild reports warnings with the ASoC codecs compiled with W=1.
>
> In file included from arch/riscv/include/asm/kgdb.h:109,
> from include/linux/kgdb.h:20,
> from include/linux/fb.h:5,
>
t; >
> > CFLAGS_REMOVE_vgettimeofday.o = $(CC_FLAGS_FTRACE) -Os $(CC_FLAGS_SCS)
> >
> > - CC_FLAGS_SCS is ShadowCallStack feature in Clang and only
> >implemented for arm64, no use for riscv.
> >
> > The bug comes from the following commit:
> >
> &g
On Sat, Jun 20, 2020 at 6:11 PM kernel test robot wrote:
>
> Hi Vincent,
>
> FYI, the error/warning still remains.
>
I have found out the root cause of this error and I will send a patch
to fix it in a couple of days.
Thanks for pointing out my mistake.
> tree: https://git.kernel.org/pub/scm/li
; >>
> >> Damien Le Moal (1):
> >> riscv: K210: Update defconfig
> >>
> >> Palmer Dabbelt (5):
> >> riscv: Allow device trees to be built into the kernel
> >> ri
Sorry, I missed the comment. Christoph's suggestion is also good to me.
I will modify it as you suggested.
Thanks
On Tue, Oct 8, 2019 at 12:31 AM Paul Walmsley wrote:
>
> On Mon, 7 Oct 2019, Christoph Hellwig wrote:
>
> > On Mon, Oct 07, 2019 at 09:08:23AM -0700, Paul Walmsley wrote:
> > >
On Sat, Sep 28, 2019 at 6:56 AM Christoph Hellwig wrote:
>
> Oh and s/rsicv/riscv/ in the subject, please.
Oh! Thank you for finding this typo.
I will correct it.
deal with the break exception as the type of break is
BUG_TRAP_TYPE_BUG.
Signed-off-by: Vincent Chen
---
arch/riscv/kernel/traps.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
index 424eb72d56b1..055a937aca70 100644
ebreak, it may cause the kernel thread to be stuck in the ebreak
instruction.
This patch set will solve the above problems by adjusting the
implementations of the do_trap_break().
Vincent Chen (4):
riscv: avoid kernel hangs when trapped in BUG()
rsicv: avoid sending a SIGTRAP to a user
On RISC-V, when the kernel runs code on behalf of a user thread, and the
kernel executes a WARN() or WARN_ON(), the user thread will be sent
a bogus SIGTRAP. Fix the RISC-V kernel code to not send a SIGTRAP when
a WARN()/WARN_ON() is executed.
Signed-off-by: Vincent Chen
---
arch/riscv/kernel
To make the code more straightforward, replacing the switch statement
with if statement.
Suggested-by: Paul Walmsley
Signed-off-by: Vincent Chen
---
arch/riscv/kernel/traps.c | 23 ---
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/arch/riscv/kernel/traps.c
the trapped process only when the ebreak is
in userspace.
Signed-off-by: Vincent Chen
---
arch/riscv/kernel/traps.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
index 82f42a55451e..dd13bc90aeb6 100644
--- a/arch
be taken when interrupts are enabled.
In this case, it may cause a deadlock problem if the rq.lock is locked
again in the timer ISR.
Hence, the handle_exception() can only enable interrupts when the state of
sstatus.SPIE is 1.
This patch is tested on HiFive Unleashed board.
Signed-off-by: Vincent
On Thu, Aug 15, 2019 at 6:17 AM Andreas Schwab wrote:
>
> On Aug 14 2019, Palmer Dabbelt wrote:
>
> > On Wed, 14 Aug 2019 13:32:50 PDT (-0700), Paul Walmsley wrote:
> >> On Wed, 14 Aug 2019, Vincent Chen wrote:
> >>
> >>> Make the __fstate_clea
state is
set to SR_FS_INITIAL in start_trhead().
Signed-off-by: Vincent Chen
Reviewed-by: Anup Patel
Reviewed-by: Christoph Hellwig
---
arch/riscv/include/asm/switch_to.h | 6 ++
arch/riscv/kernel/process.c| 11 +--
2 files changed, 15 insertions(+), 2 deletions(-)
dif
Make the __fstate_clean() function correctly set the
state of sstatus.FS in pt_regs to SR_FS_CLEAN.
Fixes: 7db91e5 ("RISC-V: Task implementation")
Cc: linux-stable
Signed-off-by: Vincent Chen
Reviewed-by: Anup Patel
Reviewed-by: Christoph Hellwig
---
arch/riscv/include/asm/switc
rectly set the state
of sstatus.FS to SR_FS_CLEAN. These problems will be solved in this patch
set.
Changes since v1:
- Remove unneeded braces
- Remove unneeded ifdef condition
- Make the correction for __fstate_clean() be a RC fix
Vincent Chen (2):
riscv: Correct the initialized flow of FP re
Reviewed-by: Christoph Hellwig
Thanks for your comments
Regards,
Vincent Chen
On Thu, Aug 8, 2019 at 6:17 PM Anup Patel wrote:
>
> On Thu, Aug 8, 2019 at 1:30 PM Vincent Chen wrote:
> >
> > Make the __fstate_clean() function can correctly set the
> > state of sstatus.FS in pt_regs to SR_FS_CLEAN.
> >
> > Tested on both QEMU an
rogram.
> > + */
> > + fstate_restore(current, regs);
> > +#endif
>
> fstate_restore has a no-op stub for the !CONFIG_FPU case, so the ifdef
> here is not needed.
>
You are right. I will remove the Ifdef condition.
> Otherwise this looks good to me:
>
> Reviewed-by: Christoph Hellwig
Thanks for your comments.
Regards,
Vincent Chen
On Thu, Aug 8, 2019 at 11:50 PM Paul Walmsley wrote:
>
> On Thu, 8 Aug 2019, Anup Patel wrote:
>
> > On Thu, Aug 8, 2019 at 1:30 PM Vincent Chen wrote:
> > >
> > > +static inline void fstate_off(struct task_struct *task,
> > > +
Make the __fstate_clean() function can correctly set the
state of sstatus.FS in pt_regs to SR_FS_CLEAN.
Tested on both QEMU and HiFive Unleashed using BBL + Linux.
Signed-off-by: Vincent Chen
---
arch/riscv/include/asm/switch_to.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
state is
set to SR_FS_INITIAL in start_trhead().
Tested on both QEMU and HiFive Unleashed using BBL + Linux.
Signed-off-by: Vincent Chen
---
arch/riscv/include/asm/switch_to.h | 6 ++
arch/riscv/kernel/process.c| 13 +++--
2 files changed, 17 insertions(+), 2 deletions
rectly set the state
of sstatus.FS to SR_FS_CLEAN. These problems will be solved in this patch
set.
Vincent Chen (2):
riscv: Correct the initialized flow of FP register
riscv: Make __fstate_clean() can work correctly.
arch/riscv/include/asm/switch_to.h | 8 +++-
arch/riscv/kernel/pro
To avoid "shift count >= width of type" warning, using statement
expressions to implement the conditional controlling before constant shift
The modification in op-2.h is taken from the glibc
commit 'sysdeps/unix/sysv/lin ("fe0b1e854ad32")'.
Signed-off-by: Vincent
data type so that many
Wshift-count-overflow warning is issued. These warnings are fixed in the
3rd patch.
Vincent Chen (3):
nds32: Avoid IEX status being incorrectly modified
nds32: add new emulations for floating point instruction
math-emu: Use statement expressions to fix Wshift-count
patch adds the emulations of such floating point
instructions.
Signed-off-by: Vincent Chen
---
Changes in v2
- No changes
arch/nds32/include/asm/fpuemu.h | 12
arch/nds32/math-emu/Makefile|5 +++-
arch/nds32/math-emu/fd2si.c | 30
arch/nds32/math
$fpcsr be raised in each denormalized output handling, the IEX
trap shall be always enabled.
Signed-off-by: Vincent Chen
---
Changes in v2
- No changes
arch/nds32/include/asm/bitfield.h|2 +-
arch/nds32/include/asm/fpu.h |2 +-
arch/nds32/include/asm
patch adds the emulations of such floating point
instructions.
Signed-off-by: Vincent Chen
---
arch/nds32/include/asm/fpuemu.h | 12
arch/nds32/math-emu/Makefile|5 +++-
arch/nds32/math-emu/fd2si.c | 30
arch/nds32/math-emu/fd2siz.c| 30
$fpcsr be raised in each denormalized output handling, the IEX
trap shall be always enabled.
Signed-off-by: Vincent Chen
---
arch/nds32/include/asm/bitfield.h|2 +-
arch/nds32/include/asm/fpu.h |2 +-
arch/nds32/include/asm/syscalls.h|2 +-
arch
sufficient when IEx
Trap is enabled because some floating point instructions only issue inexact
exception. The 2nd patch adds the emulations of such floating point
instructions.
Vincent Chen (2):
nds32: enable IEX trap too when kernel supports denormalized output
nds32: add new emulations for
pc < VMALLOC_START.
Signed-off-by: Vincent Chen
---
arch/riscv/kernel/traps.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
index 0cd0137..9551388 100644
--- a/arch/riscv/kernel/traps.c
+++ b/arch/riscv/kernel/traps.c
@@
echanism in is_valid_bugaddr(bugaddr) to think that
the trap triggered by "c.ebreak" occurs in an invalidate bug address. This
patch set will add "c.ebreak" into the check mechanism. In addition, BUG()
is also unable to work in the kernel module due to an inappropriate
condition in
The WARN() related function will trigger a debug exception. This can help
developers to analyze the cause of WARN() because if the debugger is
connected, the control flow will be transferred to debugging
environment.
Signed-off-by: Vincent Chen
---
arch/riscv/include/asm/bug.h | 28
s possibly
erroneous because if C extension is supported, the expected trap
instruction "ebreak" is possibly translated to "c.ebreak" by the assembler.
Therefore, it requires a mechanism to distinguish the length of the
instruction in $spec and compare it to the correct trap i
is required to extend
> the generic ptrace API with PTRACE_GET_SYSCALL_INFO request.
>
> Acked-by: Paul Moore
> Cc: Greentime Hu
> Cc: Vincent Chen
> Cc: Elvira Khabirova
> Cc: Eugene Syromyatnikov
> Cc: Oleg Nesterov
> Cc: Andy Lutomirski
> Cc: linux-au..
e due to an inappropriated condition in is_valid_bugaddr().
> > This issue will be fixed in this patchset. Finally, this patchset enables
> > WARN() related functions to trap the code to help developers debug it.
> >
> >
> >
> >
> >
> > Vincent Chen (3):
> &g
end the generic
> ptrace API with PTRACE_GET_SYSCALL_INFO request.
>
> Acked-by: Paul Moore
> Cc: Elvira Khabirova
> Cc: Eugene Syromyatnikov
> Cc: Greentime Hu
> Cc: Vincent Chen
> Cc: Oleg Nesterov
> Cc: Andy Lutomirski
> Cc: linux-au...@redhat.com
> Signed-
die() like BUG() when the trap
type is BUG_TRAP_TYPE_WARN because currently the WARN() does not trigger
any trap exception.
Signed-off-by: Vincent Chen
---
arch/riscv/include/asm/bug.h |7 ++-
arch/riscv/kernel/traps.c|8 +---
2 files changed, 11 insertions(+), 4 deletions(-)
d
This can help developers to analyze the cause of WARN() because the
control will be transferred to debugging environment if the debugger is
connected.
Signed-off-by: Vincent Chen
---
arch/riscv/include/asm/bug.h | 27 ++-
arch/riscv/kernel/traps.c| 19
pc < VMALLOC_START.
Signed-off-by: Vincent Chen
---
arch/riscv/kernel/traps.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
index deae0e5..dee0e5e 100644
--- a/arch/riscv/kernel/traps.c
+++ b/arch/riscv/kernel/traps.c
@@
.
Vincent Chen (3):
riscv: Add the support for c.ebreak check in is_valid_bugaddr()
riscv: Support BUG() in kernel module
riscv: Make WARN() related functions able to trigger a trap exception
On Wed, Jan 23, 2019 at 02:58:51AM +0800, Palmer Dabbelt wrote:
> On Wed, 02 Jan 2019 21:45:55 PST (-0800), li...@roeck-us.net wrote:
> > On Thu, Jan 03, 2019 at 11:32:33AM +0800, Vincent Chen wrote:
> >> The cond_resched() can be used to yield the CPU resource if
> >
.
Signed-off-by: Vincent Chen
---
arch/riscv/kernel/asm-offsets.c |1 +
arch/riscv/kernel/entry.S | 18 +-
2 files changed, 18 insertions(+), 1 deletions(-)
diff --git a/arch/riscv/kernel/asm-offsets.c b/arch/riscv/kernel/asm-offsets.c
index 6a92a2f..dac9834 100644
--- a
On Mon, Nov 26, 2018 at 06:18:01PM +0800, David Laight wrote:
> From: Vincent Chen
> > Sent: 26 November 2018 01:23
> > On Fri, Nov 23, 2018 at 06:53:37PM +0800, David Laight wrote:
> > > From: Vincent Chen
> > > > Sent: 22 November 2018 03:15
> > >
On Fri, Nov 23, 2018 at 06:53:37PM +0800, David Laight wrote:
> From: Vincent Chen
> > Sent: 22 November 2018 03:15
> >
> > The Andes FPU coprocessor does not support denormalized number handling.
> > According to the specification, FPU generates a denorm input exce
. Performance loss due to extra FPU exception
2. Need another scheme to control real underflow trap
A new parameter, UDF_trap, which is belong to FPU context is used
to control underflow trap.
User can configure this feature via CONFIG_SUPPORT_DENORMAL_ARITHMETIC
Signed-off-by: Vincent Chen
This modification is quoted from glibc 'commit <
sysdeps/unix/sysv/linux/sparc/sparc64/dl-procinfo.c: Moved to>
(fe0b1e854ad32a69b260)'
Signed-off-by: Vincent Chen
---
include/math-emu/op-2.h | 97 ++
1 files changed, 46 insertions(
required to meet requirement.
Signed-off-by: Vincent Chen
Signed-off-by: Nickhu
---
arch/nds32/Makefile |1 +
arch/nds32/include/asm/fpu.h|1 +
arch/nds32/include/asm/fpuemu.h | 32 +++
arch/nds32/include/asm/nds32_fpu_inst.h | 109
#x27;
Signed-off-by: Vincent Chen
---
include/math-emu/soft-fp.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/math-emu/soft-fp.h b/include/math-emu/soft-fp.h
index 3f284bc..5650c16 100644
--- a/include/math-emu/soft-fp.h
+++ b/include/math-emu/soft-f
CONFIG_LAYZ_FPU
- Rename _switch() to _switch_fpu()
- Store FPU context when kernel suspends
- Modify the comments in code and patch
Changes in v2:
- Remove the initilzation for floating pointer register before entering to
signal handler.
Vincent Chen (5):
nds32: nds32 FPU port
nds32: Support FP
This patch set contains basic components for supporting the nds32 FPU,
such as exception handlers and context switch for FPU registers. By
default, the lazy FPU scheme is supported and the user can configure it via
CONFIG_LZAY_FPU.
Signed-off-by: Vincent Chen
---
arch/nds32/Kconfig
; >> > On Wed, 31 Oct 2018 04:16:10 PDT (-0700), a...@brainfault.org wrote:
> >> > > On Wed, Oct 31, 2018 at 4:06 PM Vincent Chen
> >> > > wrote:
> >> > > >
> >> > > > RISC-V permits each vendor to develop respective
On Fri, Nov 02, 2018 at 01:48:57AM +0800, Karsten Merker wrote:
> On Wed, Oct 31, 2018 at 10:27:05AM -0700, Palmer Dabbelt wrote:
> > On Wed, 31 Oct 2018 04:16:10 PDT (-0700), a...@brainfault.org wrote:
> > > On Wed, Oct 31, 2018 at 4:06 PM Vincent Chen
> > > wrote
#x27;
Signed-off-by: Vincent Chen
---
include/math-emu/soft-fp.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/math-emu/soft-fp.h b/include/math-emu/soft-fp.h
index 3f284bc..5650c16 100644
--- a/include/math-emu/soft-fp.h
+++ b/include/math-emu/soft-f
This patch set contains basic components for supporting the nds32 FPU,
such as exception handlers and context switch for FPU registers. By
default, the lazy FPU scheme is supported and the user can configure it via
CONFIG_LZAY_FPU.
Signed-off-by: Vincent Chen
---
arch/nds32/Kconfig
This modification is quoted from glibc 'commit <
sysdeps/unix/sysv/linux/sparc/sparc64/dl-procinfo.c: Moved to>
(fe0b1e854ad32a69b260)'
Signed-off-by: Vincent Chen
---
include/math-emu/op-2.h | 97 ++
1 files changed, 46 insertions(
. Performance loss due to extra FPU exception
2. Need another scheme to control real underflow trap
A new parameter, UDF_trap, which is belong to FPU context is used
to control underflow trap.
User can configure this feature via CONFIG_SUPPORT_DENORMAL_ARITHMETIC
Signed-off-by: Vincent Chen
required to meet the requirement.
Signed-off-by: Vincent Chen
Signed-off-by: Nickhu
---
arch/nds32/Makefile |1 +
arch/nds32/include/asm/fpu.h|1 +
arch/nds32/include/asm/fpuemu.h | 32 +++
arch/nds32/include/asm/nds32_fpu_inst.h | 109
()
- Store FPU context when kernel suspends
- Modify the comments in code and patch
Changes in v2:
- Remove the initilzation for floating pointer register before entering to
signal handler.
Vincent Chen (5):
nds32: nds32 FPU port
nds32: Support FP emulation
nds32: support denormalized
heck here only needs to ensure that the vendor can safely
call self-checking mechanism. Hence, the macro
CHECK_VENDOR_XEXT_ISA_COMPATIBLE which is used to check compatibility
only compares the vendor's JEDEC manufacturer ID with the content of csr
$mvendorid.
Signed-off-b
the first commit.
I am glad to discuss any ideas, so if you have any idea, please give
me some feedback.
Vincent Chen (2):
RISC-V: An infrastructure to add vendor-specific code.
RISC-V: make dma_map_ops work without cache coherent agent
arch/riscv/Kconfig | 49
send the vendor-defined SBI call in this commit.
We glad to change the implementation when determining the SBI usage for
vendor.
Signed-off-by: Vincent Chen
---
arch/riscv/include/asm/sbi.h|1 +
arch/riscv/vendor-nds/cache.c | 83
arch/riscv
On Thu, Oct 11, 2018 at 03:30:30PM +0800, Arnd Bergmann wrote:
> On Thu, Oct 11, 2018 at 4:56 AM Vincent Chen wrote:
> >
> > This commit contains basic components for nds32 FPU support such as
> > FPU exception handler and context switch for FPU register.
> >
ent.
Signed-off-by: Vincent Chen
---
arch/nds32/Makefile |1 +
arch/nds32/include/asm/fpu.h|1 +
arch/nds32/include/asm/fpuemu.h | 32 +++
arch/nds32/include/asm/nds32_fpu_inst.h | 109 ++
arch/nds32/include/asm/sfp-machine.h|
This modification is quoted from glibc 'commit <
sysdeps/unix/sysv/linux/sparc/sparc64/dl-procinfo.c: Moved to>
(fe0b1e854ad32a69b260)'
Signed-off-by: Vincent Chen
---
include/math-emu/op-2.h | 97 ++
1 files changed, 46 insertions(
#x27;
Signed-off-by: Vincent Chen
---
include/math-emu/soft-fp.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/math-emu/soft-fp.h b/include/math-emu/soft-fp.h
index 3f284bc..5650c16 100644
--- a/include/math-emu/soft-fp.h
+++ b/include/math-emu/soft-f
. Need another scheme to control real underflow trap
A new parameter, UDF_trap, which is belong to FPU context is used
to control underflow trap.
User can though CONFIG_SUPPORT_DENORMAL_ARITHMETIC to configure this
feature.
Signed-off-by: Vincent Chen
---
arch/nds32/Kconfig.cpu
-date to pass the check by current compiler. The needed modification
for soft-fp is included in this patchset
Changes in v2:
- Remove the initilzation for floating pointer register before entering to
signal handler.
Vincent Chen (5):
nds32: nds32 FPU port
nds32: Support FP emulation
nds32
This commit contains basic components for nds32 FPU support such as
FPU exception handler and context switch for FPU register.
Signed-off-by: Vincent Chen
---
arch/nds32/Kconfig |1 +
arch/nds32/Kconfig.cpu | 22 +++
arch/nds32/Makefile
2. Need another scheme to control real underflow trap
A new parameter, UDF_trap, which is belong to FPU context is used
to control underflow trap.
User can though CONFIG_SUPPORT_DENORMAL_ARITHMETIC to configure this
feature.
Signed-off-by: Vincent Chen
Signed-off-by: Nickhu
the requirement.
Signed-off-by: Vincent Chen
---
arch/nds32/Makefile |1 +
arch/nds32/include/asm/fpu.h|1 +
arch/nds32/include/asm/fpuemu.h | 32 +++
arch/nds32/include/asm/nds32_fpu_inst.h | 109 ++
arch/nds32/include/asm/sfp-machine.h|
This commit contains basic components for nds32 FPU support such as
FPU exception handler and context switch for FPU register.
Signed-off-by: Vincent Chen
---
arch/nds32/Kconfig |1 +
arch/nds32/Kconfig.cpu | 22 +++
arch/nds32/Makefile
-date to pass the check by current compiler. The needed modification
for soft-fp is included in this patchset
Vincent Chen (5):
nds32: nds32 FPU port
nds32: Support FP emulation
nds32: support denormalized result through FP emulator
math-emu/op-2.h: Use statement expressions to prevent
This modification is quoted from glibc 'commit
(fe0b1e854ad32a69b260)'
Signed-off-by: Vincent Chen
---
include/math-emu/op-2.h | 97 ++
1 files changed, 46 insertions(+), 51 deletions(-)
diff --git a/include/math-emu/op-2.h b/include/m
#x27;
Signed-off-by: Vincent Chen
---
include/math-emu/soft-fp.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/math-emu/soft-fp.h b/include/math-emu/soft-fp.h
index 3f284bc..5650c16 100644
--- a/include/math-emu/soft-fp.h
+++ b/include/math-emu/soft-f
bc 'commit
(8ed1e7d5894000c155acbd06f)'
Signed-off-by: Vincent Chen
---
include/math-emu/soft-fp.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/math-emu/soft-fp.h b/include/math-emu/soft-fp.h
index 3f284bc..5650c16 100644
--- a/include/math-emu/soft-fp.h
+++ b/i
This modification references the content of glibc 'commit <
sysdeps/unix/sysv/linux/sparc/sparc64/dl-procinfo.c: Moved to>
(fe0b1e854ad32a69b260)'
Signed-off-by: Vincent Chen
---
include/math-emu/op-2.h | 97 ++
1 files changed, 46 i
On Fri, May 11, 2018 at 01:17:05PM +0800, Kito Cheng wrote:
> Hi Arnd:
>
> I am GCC guy from Andes, we've missed the release schedule for GCC 8,
> we didn't upstream the Linux support on time.
>
> Our plan is put our GCC 8 on github and continue commit rest patches
> to upstream.
> And we'll put
According to Documentation/cachetlb.txt, the cache of the page at vmaddr
shall be flushed in flush_anon_page instead of the cache of the page at
page_address(page).
Signed-off-by: Vincent Chen
---
arch/nds32/mm/cacheflush.c |9 +++--
1 files changed, 7 insertions(+), 2 deletions
same page color as page_address(page) needs to execute data write-back
in flush_dcache_page function.
Signed-off-by: Vincent Chen
---
arch/nds32/mm/cacheflush.c | 21 -
1 files changed, 12 insertions(+), 9 deletions(-)
diff --git a/arch/nds32/mm/cacheflush.c b/arch
In order to ensure that all data in source page has been written back
to memory before copy_page, the local irq shall be disabled before
calling cpu_dcache_wb_page(). In addition, removing unneeded page
invalidation for 'to' page.
Signed-off-by: Vincent Chen
---
arch/nds32/mm/ca
. Removing unneeded cache invalidation in copy_user_highpage function.
Vincent Chen (3):
nds32: Correct flush_dcache_page function
nds32: Flush the cache of the page at vmaddr instead of kaddr in
flush_anon_page
nds32: Disable local irq before calling cpu_dcache_wb_page in
2018-04-26 0:13 GMT+08:00 Eric W. Biederman :
>
> While reviewing f6ed1ecad56f ("signal/nds32: Use force_sig(SIGILL) in
> do_revisn")
> Vincent Chen asked if it was possible to provide more information in
> do_revinsn
> with force_sig_fault.
>
> That seems reas
cess to read any of the siginfo fields. So simplfy things and
> just use force_sig instead of force_sig_info.
>
> Fixes: 2923f5ea7738 ("nds32: Exception handling")
> Cc: Vincent Chen
> Cc: Greentime Hu
> Cc: Arnd Bergmann
> Signed-off-by: "Eric W. Bie
force_sig(SIG_ILL, current)" instead.
>
> Fixes: 2923f5ea7738 ("nds32: Exception handling")
> Cc: Vincent Chen
> Cc: Greentime Hu
> Cc: Arnd Bergmann
> Signed-off-by: "Eric W. Biederman"
> ---
> arch/nds32/kernel/traps.c | 5 +
> 1 file chang
o
> is called, which makes the calling function clearer.
>
> Cc: Greentime Hu
> Cc: Vincent Chen
> Signed-off-by: "Eric W. Biederman"
> ---
> arch/nds32/kernel/traps.c | 20
> arch/nds32/mm/fault.c | 19 +--
> 2 files ch
t;> counter).
>>
>> Signed-off-by: Vincent Chen
>> Signed-off-by: Greentime Hu
>
> Acked-by: Arnd Bergmann
Dear Arnd Bergmann:
We find a small bug here which make LTP 20170929 clock_getres01
fail. The bug is in __vdso_clock_getres() function. When argument res
is NU
ll recover it.
We verify all modifications by LTP 2017 related cases and glibc
2.26 testsuite. We plan to add it in the next version patch and
hope you can give us some comments as before.
Thanks
Vincent
2018-01-24 19:13 GMT+08:00 Arnd Bergmann :
> On Wed, Jan 24, 2018 at 1:56 AM, Vincent C
2018-01-24 19:10 GMT+08:00 Arnd Bergmann :
> On Wed, Jan 24, 2018 at 12:09 PM, Arnd Bergmann wrote:
>> On Wed, Jan 24, 2018 at 11:53 AM, Vincent Chen wrote:
>>> 2018-01-18 18:14 GMT+08:00 Arnd Bergmann :
>
>> Ok. I still wonder about the kernel part of this though: is
2018-01-18 18:14 GMT+08:00 Arnd Bergmann :
> On Mon, Jan 15, 2018 at 6:53 AM, Greentime Hu wrote:
>> From: Greentime Hu
>>
>> This patch includes the exception/interrupt entries, pt_reg structure and
>> related accessors.
>>
>> Signed-off-by: Vince
2018-01-18 18:30 GMT+08:00 Arnd Bergmann :
> On Mon, Jan 15, 2018 at 6:53 AM, Greentime Hu wrote:
>> From: Greentime Hu
>>
>> This patch adds support for signal handling.
>>
>> Signed-off-by: Vincent Chen
>> Signed-off-by: Greentime Hu
>
> I n
2018-01-18 18:37 GMT+08:00 Arnd Bergmann :
> On Mon, Jan 15, 2018 at 6:53 AM, Greentime Hu wrote:
>> From: Greentime Hu
>>
>> This patch adds ptrace support.
>>
>> Signed-off-by: Vincent Chen
>> Signed-off-by: Greentime Hu
>
> I must have missed th
er by summation of __get_timerpage() and
counter register offset where __get_timerpage() is used to derive the
virtual address of memory-mapped clock.
2018-01-20 19:11 GMT+08:00 Vincent Chen :
> 2018-01-18 19:08 GMT+08:00 Arnd Bergmann :
>> On Mon, Jan 15, 2018 at 6:57 AM, Greentime Hu w
DSO needs atcpit100 offering real-time cycle count
>> to derive the correct time.
>>
>> Signed-off-by: Vincent Chen
>> Signed-off-by: Rick Chen
>> Signed-off-by: Greentime Hu
>
> I'm a bit puzzled by this patch, can you explain how the vdso actually
>
2017-12-18 19:19 GMT+08:00 Arnd Bergmann :
> On Mon, Dec 18, 2017 at 7:46 AM, Greentime Hu wrote:
>
>
>> new file mode 100644
>> index 000..90da745
>> --- /dev/null
>> +++ b/arch/nds32/include/uapi/asm/unistd.h
>> @@ -0,0 +1,12 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +// Copyright (C) 20
2017-12-08 20:14 GMT+08:00 Mark Rutland :
> On Fri, Dec 08, 2017 at 07:54:42PM +0800, Greentime Hu wrote:
>> 2017-12-08 18:21 GMT+08:00 Mark Rutland :
>> > On Fri, Dec 08, 2017 at 05:12:00PM +0800, Greentime Hu wrote:
>> >> +static int grab_timer_node_info(void)
>> >> +{
>> >> + struct device_n
2017-11-27 21:57 GMT+08:00 Mark Rutland :
> Hi,
>
> On Mon, Nov 27, 2017 at 08:27:57PM +0800, Greentime Hu wrote:
>> +static inline void arch_spin_unlock(arch_spinlock_t * lock)
>> +{
>> + asm volatile(
>> + "xor$r15, $r15, $r15\n"
>> + "swi$r15, [%0]\n"
>> +
2017-11-27 22:34 GMT+08:00 Arnd Bergmann :
> On Mon, Nov 27, 2017 at 1:28 PM, Greentime Hu wrote:
>> +struct user_pt_regs {
>> + long uregs[26];
>> + long fp;
>> + long gp;
>> + long lp;
>> + long sp;
>> + long ipc;
>> +#if defined(CONFIG_HWZOL)
>> + long
2017-11-27 22:37 GMT+08:00 Arnd Bergmann :
> On Mon, Nov 27, 2017 at 1:28 PM, Greentime Hu wrote:
>
>> +#ifndef _ASMNDS32_SIGNAL_H
>> +#define _ASMNDS32_SIGNAL_H
>> +
>> +#define SA_RESTORER0x0400
>> +
>> +#include
>> +#endif
>
> As documented in asm-generic/signal.h, new architectures sh
2017-11-27 22:46 GMT+08:00 Arnd Bergmann :
> On Mon, Nov 27, 2017 at 1:28 PM, Greentime Hu wrote:
>
>> diff --git a/arch/nds32/include/asm/syscalls.h
>> b/arch/nds32/include/asm/syscalls.h
>> new file mode 100644
>> index 000..741ccdc
>> --- /dev/null
>> +++ b/arch/nds32/include/asm/syscalls.
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