Hi Adrian,
On 7/25/2018 5:23 PM, Adrian Hunter wrote:
On 20/07/18 13:46, Vijay Viswanath wrote:
Some controllers can have internal mechanism to inform the SW that it
is ready for voltage switching. For such controllers, changing voltage
before the HW is ready can result in various issues
Hi Sayali,
On 7/13/2018 3:22 PM, Sayali Lokhande wrote:
This change adds the use of devfreq to MMC.
Both eMMC and SD card will use it.
For some workloads, such as video playback, it isn't
necessary for these cards to run at high speed.
Running at lower frequency, for example 52MHz, in such
cases
.
Signed-off-by: Asutosh Das
Signed-off-by: Venkat Gopalakrishnan
Signed-off-by: Veerabhadrarao Badiganti
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 220 ---
1 file changed, 209 insertions(+), 11 deletions(-)
diff --git a/drivers/mmc
The load a particular sdhc controller should request from a regulator
is device specific and hence each device should individually vote for
the required load.
Signed-off-by: Vijay Viswanath
---
Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 6 ++
1 file changed, 6 insertions(+)
diff
driver.
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci.c | 21 -
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 1c828e0..494a1e2 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
s if sdhci_msm layer is present.
Tested on: sdm845
Requies patch series:"[PATCH V3 0/4] Changes for SDCC5 version"
Vijay Viswanath (3):
mmc: sdhci: Allow platform controlled voltage switching
Documentation: sdhci-msm: Add entries for passing load values
mmc: sdhci-msm: Use internal v
On 7/17/2018 3:24 PM, Adrian Hunter wrote:
On 17/07/18 12:45, Vijay Viswanath wrote:
On 7/17/2018 2:12 PM, Adrian Hunter wrote:
On 17/07/18 11:40, Vijay Viswanath wrote:
On 7/17/2018 1:00 PM, Adrian Hunter wrote:
On 17/07/18 08:14, Vijay Viswanath wrote:
On 7/10/2018 4:37 PM
On 7/17/2018 2:12 PM, Adrian Hunter wrote:
On 17/07/18 11:40, Vijay Viswanath wrote:
On 7/17/2018 1:00 PM, Adrian Hunter wrote:
On 17/07/18 08:14, Vijay Viswanath wrote:
On 7/10/2018 4:37 PM, Adrian Hunter wrote:
On 21/06/18 15:23, Vijay Viswanath wrote:
Some controllers can have
On 7/17/2018 1:00 PM, Adrian Hunter wrote:
On 17/07/18 08:14, Vijay Viswanath wrote:
On 7/10/2018 4:37 PM, Adrian Hunter wrote:
On 21/06/18 15:23, Vijay Viswanath wrote:
Some controllers can have internal mechanism to inform the SW that it
is ready for voltage switching. For such
On 7/10/2018 4:37 PM, Adrian Hunter wrote:
On 21/06/18 15:23, Vijay Viswanath wrote:
Some controllers can have internal mechanism to inform the SW that it
is ready for voltage switching. For such controllers, changing voltage
before the HW is ready can result in various issues.
Add a quirk
.
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 99 ++--
1 file changed, 87 insertions(+), 12 deletions(-)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index a0dc3e1..ebdde29 100644
--- a/drivers/mmc/host/sdhci
the msm driver and use them.
Voltage switching from core layer is causing CRC/cmd timeout errors in
some chipsets.
Tested on: sdm845, db410c
Requies patch series:"[PATCH V3 0/4] Changes for SDCC5 version"
Vijay Viswanath (2):
mmc: sdhci: Allow platform controlled voltage switching
Some controllers can have internal mechanism to inform the SW that it
is ready for voltage switching. For such controllers, changing voltage
before the HW is ready can result in various issues.
Add a quirk, which can be used by drivers of such controllers.
Signed-off-by: Vijay Viswanath
From: Sayali Lokhande
Add support to use the new compatible string "qcom,sdhci-msm-v5".
Based on the msm variant, pick the relevant variant data and
use it for register read/write to msm specific registers.
Signed-off-by: Sayali Lokhande
Signed-off-by: Vijay Viswanath
Reviewed-by:
From: Sayali Lokhande
For SDCC version 5.0.0 and higher, new compatible string
"qcom,sdhci-msm-v5" is added.
Signed-off-by: Sayali Lokhande
Signed-off-by: Vijay Viswanath
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 7 ++-
1 file changed, 6
.
Also defind new data structure to hold version specific Ops and
register addresses.
Signed-off-by: Sayali Lokhande
Signed-off-by: Vijay Viswanath
Reviewed-by: Evan Green
---
drivers/mmc/host/sdhci-msm.c | 75
1 file changed, 75 insertions(+)
diff
-by: Vijay Viswanath
Reviewed-by: Evan Green
Acked-by: Adrian Hunter
---
drivers/mmc/host/sdhci-msm.c | 89
1 file changed, 89 insertions(+)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index bb11916..4050c99 100644
--- a
ss map
Documentation: sdhci-msm: Add new compatible string for SDCC v5
mmc: host: Register changes for sdcc V5
Vijay Viswanath (1):
mmc: sdhci-msm: Add msm version specific ops and data structures
.../devicetree/bindings/mmc/sdhci-msm.txt | 7 +-
drivers/mmc/host/s
On 6/13/2018 4:55 AM, Stephen Boyd wrote:
Quoting Vijay Viswanath (2018-05-29 02:52:41)
@@ -137,6 +125,12 @@
/* Timeout value to avoid infinite waiting for pwr_irq */
#define MSM_PWR_IRQ_TIMEOUT_MS 5000
+#define MSM_HOST_READL(msm_host, host, offset) \
+ msm_host->var_
Hi Stephen,
On 6/13/2018 5:06 AM, Stephen Boyd wrote:
Quoting Vijay Viswanath (2018-05-29 02:52:39)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index 4050c99..2a66aa0 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -226,6 +226,24
nd I didn't get any "Reset 0x1 never completed" error during card
insert/remove or shutdown.
Thanks,
Vijay
On 5/29/2018 5:49 PM, Georgi Djakov wrote:
Hello Vijay,
On 09/27/2017 08:34 AM, Vijay Viswanath wrote:
Register writes which change voltage of IO lines or turn the IO bus
Add support to use the new compatible string "qcom,sdhci-msm-v5".
Based on the msm variant, pick the relevant variant data and
use it for register read/write to msm specific registers.
Signed-off-by: Sayali Lokhande
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-m
.
Also defind new data structure to hold version specific Ops and
register addresses.
Signed-off-by: Sayali Lokhande
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 77
1 file changed, 77 insertions(+)
diff --git a/drivers/mmc/host
From: Sayali Lokhande
For SDCC version 5.0.0 and higher, new compatible string
"qcom,sdhci-msm-v5" is added.
Signed-off-by: Sayali Lokhande
Signed-off-by: Vijay Viswanath
---
Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 7 ++-
1 file changed, 6 insertions(+), 1 deletio
-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 89
1 file changed, 89 insertions(+)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index bb11916..4050c99 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc
c: sdhci-msm: Define new Register address map
Documentation: sdhci-msm: Add new compatible string for SDCC v5
Vijay Viswanath (2):
mmc: sdhci-msm: Add msm version specific ops and data structures
mmc: host: Register changes for sdcc V5
.../devicetree/bindings/mmc/sdhci-msm.txt |
On 5/22/2018 11:42 PM, Evan Green wrote:
Hi Vijay. Thanks for this patch.
On Thu, May 17, 2018 at 3:30 AM Vijay Viswanath
wrote:
From: Sayali Lokhande
For SDCC version 5.0.0 and higher, new compatible string
"qcom,sdhci-msm-v5" is added.
Based on the msm variant, pick th
On 5/22/2018 11:40 PM, Evan Green wrote:
On Thu, May 17, 2018 at 3:30 AM Vijay Viswanath
wrote:
In addition to offsets of certain registers changing, the registers in
core_mem have been shifted to HC mem as well. To access these registers,
define msm version specific functions. These
On 5/22/2018 11:39 PM, Evan Green wrote:
Hi Vijay,
On Thu, May 17, 2018 at 3:30 AM Vijay Viswanath
wrote:
From: Sayali Lokhande
For SDCC version 5.0.0, MCI registers are removed from SDCC
interface and some registers are moved to HC.
Define a new data structure where we can statically
.
Also defind new data structure to hold version specific Ops and register
addresses.
Signed-off-by: Sayali Lokhande
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 112 +++
1 file changed, 112 insertions(+)
diff --git a/drivers/mmc/host
mmc: host: Register changes for sdcc V5
Vijay Viswanath (1):
mmc: sdhci-msm: Add msm version specific ops and data structures
.../devicetree/bindings/mmc/sdhci-msm.txt | 5 +-
drivers/mmc/host/sdhci-msm.c | 545 -
2 files changed, 423 insertio
-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 89
1 file changed, 89 insertions(+)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index bb11916..2524455 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc
From: Sayali Lokhande
For SDCC version 5.0.0 and higher, new compatible string
"qcom,sdhci-msm-v5" is added.
Based on the msm variant, pick the relevant variant data and
use it for register read/write to msm specific registers.
Signed-off-by: Sayali Lokhande
Signed-off-by: Vijay
On 5/2/2018 2:19 PM, Ulf Hansson wrote:
On 1 May 2018 at 12:39, Vijay Viswanath wrote:
From: Asutosh Das
Some platforms require that the voltage switching happen only after
the register write occurs and controller is ready for the switch. When
the controller is ready, it will inform
On 5/2/2018 1:58 PM, Ulf Hansson wrote:
On 1 May 2018 at 12:39, Vijay Viswanath wrote:
From: Sayali Lokhande
For SDCC version 5.0.0, MCI registers are removed from SDCC
interface and some registers are moved to HC. This change is
to support MCI register removal for msmfalcon. New
[vvisw...@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Vijay Viswanath
Change-Id: I3370a2411beec1f03cc5f102bf95cd816c60351e
---
drivers/mmc/host/sdhci.c | 11 ---
drivers/mmc/host/sdhci.h | 1 +
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/sdh
From: Sahitya Tummala
This is needed to get the current capabilities of vdd
regulator that is not managed by SDHCI driver.
Change-Id: I927c14b9890f1d672fe8a3e89d0b334f43463b36
Signed-off-by: Sahitya Tummala
Signed-off-by: Sayali Lokhande
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host
instead of relying on core layer voltage switching.
Change-Id: Iaa98686e71a5bfe0092c68e9ffa563b060c5ac60
Signed-off-by: Asutosh Das
Signed-off-by: Venkat Gopalakrishnan
Signed-off-by: Subhash Jadavani
Signed-off-by: Vijay Viswanath
---
.../devicetree/bindings/mmc/sdhci-msm.txt | 27
Change-Id: I0febfd9bb436a8eff20c20107dd4180c9781
Signed-off-by: Sayali Lokhande
Signed-off-by: Vijay Viswanath
---
.../devicetree/bindings/mmc/sdhci-msm.txt | 5 +-
drivers/mmc/host/sdhci-msm.c | 485 +++--
2 files changed, 365 insertions(+), 125
With SDCC5, the MCI register space got removed and the offset/order of
several registers have changed. Based on SDCC version used and the register,
we need to pick the base address and offset.
Also power irq is a signal from controller to SW that it is ready for
voltage switch. So added support to
During probe check whether the vdd-io regulator of sdhc platform device
can support 1.8V and 3V and store this information as a capability of
platform device.
Signed-off-by: Vijay Viswanath
Reviewed-by: Douglas Anderson
---
drivers/mmc/host/sdhci-msm.c | 29 -
1
power irq is
triggered for io high or io low, the driver should check the voltages
supported and set the pad accordingly.
Signed-off-by: Krishna Konda
Signed-off-by: Venkat Gopalakrishnan
Signed-off-by: Vijay Viswanath
Reviewed-by: Douglas Anderson
---
drivers/mmc/host/sdhci-msm.c | 57
v4:
Removed unnecessary mb() within sdhci_msm_handle_pwr_irq() since
wakeup calls have implicit write barriers.
Krishna Konda (1):
mmc: sdhci-msm: support voltage pad switching
Vijay Viswanath (1):
mmc: sdhci-msm: Add support to store supported vdd-io voltages
drivers/mmc/host/sdhci-ms
On 4/13/2018 10:38 PM, Doug Anderson wrote:
Hi,
On Fri, Apr 6, 2018 at 2:48 AM, Vijay Viswanath wrote:
On 3/29/2018 4:23 AM, Doug Anderson wrote:
Hi,
On Wed, Mar 28, 2018 at 6:08 AM, Vijay Viswanath
wrote:
From: Krishna Konda
The PADs for SD card are dual-voltage that support 3v
On 3/29/2018 4:23 AM, Doug Anderson wrote:
Hi,
On Wed, Mar 28, 2018 at 6:08 AM, Vijay Viswanath
wrote:
From: Krishna Konda
The PADs for SD card are dual-voltage that support 3v/1.8v. Those PADs
have a control signal (io_pad_pwr_switch/mode18 ) that indicates
whether the PAD works in 3v
On 3/29/2018 4:22 AM, Doug Anderson wrote:
Hi,
On Wed, Mar 28, 2018 at 6:08 AM, Vijay Viswanath
wrote:
During probe check whether the vdd-io regulator of sdhc platform device
can support 1.8V and 3V and store this information as a capability of
platform device.
Signed-off-by: Vijay
for IO lines. So when power irq is
triggered for io high or io low, the driver should check the voltages
supported and set the pad accordingly.
Signed-off-by: Krishna Konda
Signed-off-by: Venkat Gopalakrishnan
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 64
During probe check whether the vdd-io regulator of sdhc platform device
can support 1.8V and 3V and store this information as a capability of
platform device.
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 35 ++-
1 file changed, 34 insertions
mmc: sdhci-msm: support voltage pad switching
Vijay Viswanath (1):
mmc: sdhci-msm: Add support to store supported vdd-io voltages
drivers/mmc/host/sdhci-msm.c | 99 +++-
1 file changed, 97 insertions(+), 2 deletions(-)
--
Qualcomm India Private Limited,
v2:
IO_PAD_PWR_SWITCH_EN will be set only if we have info regarding what
voltage is suported by the regulators.
Replaced regulator_list_voltage() API with
regulator_is_supported_voltage().
Krishna Konda (1):
mmc: sdhci-msm: support voltage pad switching
Vijay Viswanath (1):
for IO lines. So when power irq is
triggered for io high or io low, the driver should check the voltages
supported and set the pad accordingly.
Signed-off-by: Krishna Konda
Signed-off-by: Venkat Gopalakrishnan
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 65
During probe check whether the vdd-io regulator of sdhc platform device
can support 1.8V and 3V and store this information as a capability of
platform device.
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 36 +++-
1 file changed, 35 insertions
On 3/7/2018 9:42 PM, Doug Anderson wrote:
Hi,
On Tue, Mar 6, 2018 at 11:13 PM, Vijay Viswanath
wrote:
Hi Dough, Jeremy,
On 3/3/2018 4:38 AM, Jeremy McNicoll wrote:
On 2018-03-02 10:23 AM, Doug Anderson wrote:
Hi,
On Sun, Feb 11, 2018 at 10:01 PM, Vijay Viswanath
wrote:
During
Hi Dough, Jeremy,
On 3/3/2018 4:38 AM, Jeremy McNicoll wrote:
On 2018-03-02 10:23 AM, Doug Anderson wrote:
Hi,
On Sun, Feb 11, 2018 at 10:01 PM, Vijay Viswanath
wrote:
During probe check whether the vdd-io regulator of sdhc platform device
can support 1.8V and 3V and store this information
for IO lines. So when power irq is
triggered for io high or io low, the driver should check the voltages
supported and set the pad accordingly.
Signed-off-by: Krishna Konda
Signed-off-by: Venkat Gopalakrishnan
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 34
During probe check whether the vdd-io regulator of sdhc platform device
can support 1.8V and 3V and store this information as a capability of
platform device.
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 38 ++
1 file changed, 38
ort voltage pad switching
Vijay Viswanath (1):
mmc: sdhci-msm: Add support to store supported vdd-io voltages
drivers/mmc/host/sdhci-msm.c | 72
1 file changed, 72 insertions(+)
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovat
On 2/3/2018 3:21 AM, Bjorn Andersson wrote:
On Thu 18 Jan 00:05 PST 2018, Vijay Viswanath wrote:
From: Krishna Konda
The PADs for sdhc controller are dual-voltage that support 3v/1.8v.
Those PADs have a control signal (io_pad_pwr_switch/mode18 ) that
indicates whether the PAD works in 3v
used for IO lines. So when power irq is
triggered for io high or io low, the driver should check the voltages
supported and set the pad accordingly.
Signed-off-by: Krishna Konda
Signed-off-by: Venkat Gopalakrishnan
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 38
During probe check whether the vdd-io regulator of sdhc platform device
can support 1.8V and 3V and store this information as a capability of
platform device.
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 38 ++
1 file changed, 38
the
SDC1_SDCC_HC_VENDOR_SPECIFIC_FUNC register:
HC_IO_PAD_PWR_SWITCH: bit 16
HC_IO_PAD_PWR_SWITCH_EN: bit 15
Krishna Konda (1):
mmc: sdhci-msm: support voltage pad switching
Vijay Viswanath (1):
mmc: sdhci-msm: Add support to store supported vdd-io voltages
drivers/mmc/host/sd
On 10/14/2017 1:01 PM, Bjorn Andersson wrote:
On Tue 26 Sep 22:34 PDT 2017, Vijay Viswanath wrote:
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
[..]
+ if (!done) {
+ if (!wait_event_timeout(msm_host->pwr_irq_w
spurious power IRQ which results in system instability.
Signed-off-by: Sahitya Tummala
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 46
1 file changed, 42 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/host/sdhci-msm.c b
and complete if the irq is expected.
This patch requires CONFIG_MMC_SDHCI_IO_ACCESSORS to be enabled.
Signed-off-by: Sahitya Tummala
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 173 ++-
1 file changed, 171 insertions(+), 2 deletions
Enable CONFIG_MMC_SDHCI_IO_ACCESSORS so that SDHC controller specific
register read and write APIs, if registered, can be used.
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
status
is acknowledged otherwise power irq interrupt handler would be fired
prematurely.
Signed-off-by: Subhash Jadavani
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers
ower irq
Vijay Viswanath (2):
mmc: Kconfig: Enable CONFIG_MMC_SDHCI_IO_ACCESSORS
mmc: sdhci-msm: Add sdhci msm register write APIs which wait for pwr
irq
drivers/mmc/host/Kconfig | 1 +
drivers/mmc/host/sdhci-msm.c | 235 ++-
2 files changed,
On 9/14/2017 12:04 PM, Adrian Hunter wrote:
On 30/08/17 15:51, Vijay Viswanath wrote:
Enable CONFIG_MMC_SDHCI_IO_ACCESSORS so that SDHC controller specific
register read and write APIs, if registered, can be used.
Missing signed-off
Why don't you put this patch earlier in the patch se
Hi Adrian, Ulf,
I have addressed the comments on previous patch series. Can you please
tell how I should proceed from here?
Thanks,
Vijay
On 8/30/2017 6:21 PM, Vijay Viswanath wrote:
Register writes which change voltage of IO lines or turn the IO bus on/off
require sdhc controller to be
status
is acknowledged otherwise power irq interrupt handler would be fired
prematurely.
Signed-off-by: Subhash Jadavani
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers
.
Sahitya Tummala (2):
mmc: sdhci-msm: Fix HW issue with power IRQ handling during reset
mmc: sdhci-msm: Add support to wait for power irq
Subhash Jadavani (1):
mmc: sdhci-msm: fix issue with power irq
Vijay Viswanath (2):
mmc: sdhci-msm: Add ops to do sdhc register write
mmc: Kconfig
From: Sahitya Tummala
Add support API which will check if power irq is expected to be
generated and wait for the power irq to come and complete if the irq is
expected.
Signed-off-by: Sahitya Tummala
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 124
SDHCI_POWER_CONTROL register.
* There is a state change in 1.8V enable bit (bit 3) of
SDHCI_HOST_CONTROL2 register.
* Bit 1 of SDHCI_SOFTWARE_RESET is set.
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 69 +++-
1 file changed, 68 insertions
Enable CONFIG_MMC_SDHCI_IO_ACCESSORS so that SDHC controller specific
register read and write APIs, if registered, can be used.
---
drivers/mmc/host/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 2db84dd..64a9298 100644
--- a/d
spurious power IRQ which results in system instability.
Signed-off-by: Sahitya Tummala
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 46
1 file changed, 42 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/host/sdhci-msm.c b
On 8/22/2017 3:08 PM, Ulf Hansson wrote:
On 18 August 2017 at 07:19, Vijay Viswanath wrote:
Enable CONFIG_MMC_SDHCI_IO_ACCESSORS so that SDHC controller specific
register read and write APIs, if registered, can be used.
Signed-off-by: Vijay Viswanath
---
arch/arm64/configs/defconfig | 1
On 8/24/2017 3:41 PM, Adrian Hunter wrote:
On 18/08/17 08:19, Vijay Viswanath wrote:
Register writes which change voltage of IO lines or turn the IO bus
on/off require controller to be ready before progressing further. When
the controller is ready, it will generate a power irq which needs to
On 8/24/2017 3:35 PM, Adrian Hunter wrote:
On 18/08/17 08:19, Vijay Viswanath wrote:
From: Sahitya Tummala
Add support API which will check if power irq is expected to be
generated and wait for the power irq to come and complete if the irq is
expected.
Signed-off-by: Sahitya Tummala
On 8/24/2017 1:12 PM, Adrian Hunter wrote:
On 18/08/17 08:19, Vijay Viswanath wrote:
From: Sahitya Tummala
There is a rare scenario in HW, where the first clear pulse could
be lost when the actual reset and clear/read of status register
are happening at the same time. Fix this by retrying
On 8/24/2017 1:10 PM, Adrian Hunter wrote:
On 18/08/17 08:19, Vijay Viswanath wrote:
From: Subhash Jadavani
SDCC controller reset (SW_RST) during probe may trigger power irq if
previous status of PWRCTL was either BUS_ON or IO_HIGH_V. So before we
enable the power irq interrupt in GIC (by
From: Sahitya Tummala
Add support API which will check if power irq is expected to be
generated and wait for the power irq to come and complete if the irq is
expected.
Signed-off-by: Sahitya Tummala
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 125
SDHCI_POWER_CONTROL register.
* There is a state change in 1.8V enable bit (bit 3) of
SDHCI_HOST_CONTROL2 register.
* Bit 1 of SDHCI_SOFTWARE_RESET is set.
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 39 +++
1 file changed, 39 insertions
Enable CONFIG_MMC_SDHCI_IO_ACCESSORS so that SDHC controller specific
register read and write APIs, if registered, can be used.
Signed-off-by: Vijay Viswanath
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs
spurious power IRQ which results in system instability.
Signed-off-by: Sahitya Tummala
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 43 ---
1 file changed, 40 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/sdhci-msm.c b
HW issue with power IRQ handling during reset
mmc: sdhci-msm: Add support to wait for power irq
Subhash Jadavani (1):
mmc: sdhci-msm: fix issue with power irq
Vijay Viswanath (2):
mmc: sdhci-msm: Add ops to do sdhc register write
defconfig: msm: Enable CONFIG_MMC_SDHCI_IO_ACCESSORS
arch
status
is acknowledged otherwise power irq interrupt handler would be fired
prematurely.
Signed-off-by: Subhash Jadavani
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/drivers/mmc/host/sdhci-msm.c b
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