, the function clk_frac_recalc_rate returned
a bad result. The multiplication is made before the division to compute a
correct value.
Signed-off-by: Victorien Vedrine
---
drivers/clk/mxs/clk-frac.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/mxs/clk
+Shawn
On 07/31/2015 09:24 AM, Victorien Vedrine wrote:
On drivers/clk/mxs/clk-frac.c, the function clk_frac_round_rate
returned a bad
result. The division before multiplication computes a wrong value ;
the
calculation is inverted to fix the problem. The second issue is that
the exact
rate hav
h the divider register (HW_CLKCTRL_SAIF0), the closest lower value is
22573242.1875Hz (0xC0A on register). The original clk-frac functions give 0xC09
on the divider register.
Signed-off-by: Victorien Vedrine
---
drivers/clk/mxs/clk-frac.c | 13 ++---
1 file changed, 10 insertions(+), 3 dele
3 matches
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