On Wed, Dec 18, 2024 at 5:08 PM Naresh Kamboju
wrote:
>
> The Rust gcc builds failed due to following build warnings / errors on the
> x86_64 and arm64 architectures with selftests/rust/config on the Linux
> next-20241216...next-20241218.
>
> First seen on the next-20241216 tag.
> Good: next-20241
Usage of pseudo-random functions requires inclusion of
header instead of .
Signed-off-by: Uros Bizjak
Cc: Brendan Higgins
Cc: David Gow
Cc: Rae Moar
Cc: linux-kselft...@vger.kernel.org
Cc: kunit-...@googlegroups.com
---
lib/kunit/string-stream-test.c | 1 +
1 file changed, 1 insertion
Hiramatsu
Signed-off-by: Uros Bizjak
---
kernel/trace/ring_buffer.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/kernel/trace/ring_buffer.c b/kernel/trace/ring_buffer.c
index a1651edc48d5..3e2a6478425c 100644
--- a/kernel/trace/ring_buffer.c
+++ b/kernel/trace
Avoid jump by moving exception fixups out of line.
Cc: Sean Christopherson
Cc: Paolo Bonzini
Signed-off-by: Uros Bizjak
---
arch/x86/kvm/svm/vmenter.S | 35 ---
1 file changed, 20 insertions(+), 15 deletions(-)
diff --git a/arch/x86/kvm/svm/vmenter.S b/arch
> The effort to make the ASM entry code slim and unified moved the irq stack
> switching out of the low level ASM code so that the whole return from
> interrupt work and state handling can be done in C and the ASM code just
> handles the low level details of entry and exit.
>
> This ended up being
On Mon, Dec 21, 2020 at 11:01 PM Krish Sadhukhan
wrote:
>
>
> On 12/21/20 11:48 AM, Uros Bizjak wrote:
> > Merge __kvm_handle_fault_on_reboot with its sole user
> > and move the definition of __ex to a common include to be
> > shared between VMX and SVM.
> >
>
Merge __kvm_handle_fault_on_reboot with its sole user
and move the definition of __ex to a common include to be
shared between VMX and SVM.
v2: Rebase to the latest kvm/queue.
v3: Incorporate changes from review comments.
Cc: Paolo Bonzini
Cc: Sean Christopherson
Signed-off-by: Uros Bizjak
On Mon, Dec 21, 2020 at 7:57 PM Uros Bizjak wrote:
>
> On Mon, Dec 21, 2020 at 7:19 PM Sean Christopherson wrote:
> >
> > On Sun, Dec 20, 2020, Uros Bizjak wrote:
> > > Merge __kvm_handle_fault_on_reboot with its sole user
> >
> > There's also a
On Mon, Dec 21, 2020 at 7:19 PM Sean Christopherson wrote:
>
> On Sun, Dec 20, 2020, Uros Bizjak wrote:
> > Merge __kvm_handle_fault_on_reboot with its sole user
>
> There's also a comment in vmx.c above kvm_cpu_vmxoff() that should be updated.
> Alternatively, and
Merge __kvm_handle_fault_on_reboot with its sole user
and move the definition of __ex to a common include to be
shared between VMX and SVM.
v2: Rebase to latest kvm/queue.
Cc: Paolo Bonzini
Cc: Sean Christopherson
Signed-off-by: Uros Bizjak
Reviewed-by: Krish Sadhukhan
---
arch/x86/include
Commit 16809ecdc1e8a moved __svm_vcpu_run the prototype to svm.h,
but forgot to remove the original from svm.c.
Fixes: 16809ecdc1e8a ("KVM: SVM: Provide an updated VMRUN invocation for SEV-ES
guests")
Cc: Tom Lendacky
Cc: Paolo Bonzini
Signed-off-by: Uros Bizjak
---
arch/x86/kvm
Merge __kvm_handle_fault_on_reboot with its sole user
and move the definition of __ex to a common include to be
shared between VMX and SVM.
Cc: Paolo Bonzini
Cc: Sean Christopherson
Signed-off-by: Uros Bizjak
---
arch/x86/include/asm/kvm_host.h | 25 -
arch/x86/kvm/svm
Bonzini
Cc: Sean Christopherson
Reviewed-and-tested-by: Sean Christopherson
Signed-off-by: Uros Bizjak
---
arch/x86/kvm/vmx/nested.c | 32 +++-
arch/x86/kvm/vmx/vmenter.S | 2 +-
arch/x86/kvm/vmx/vmx.c | 2 --
arch/x86/kvm/vmx/vmx.h | 1 +
4 files changed, 5
Add arch_try_cmpxchg64(), similar to arch_try_cmpxchg(), that
operates with 64 bit operands. This function provides the same
interface for 32 bit and 64 bit targets.
v2: Use correct #ifdef.
Signed-off-by: Uros Bizjak
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: Borislav Petkov
Cc: "H. Peter
On Tue, Dec 15, 2020 at 7:28 PM Uros Bizjak wrote:
>
> Add arch_try_cmpxchg64(), similar to arch_try_cmpxchg(), that
> operates with 64 bit operands. This function provides the same
> interface for 32 bit and 64 bit targets.
>
> Signed-off-by: Uros Bizjak
> Cc: Thomas Gleixn
Cc: Sean Christopherson
Cc: Vitaly Kuznetsov
Cc: Wanpeng Li
Cc: Jim Mattson
Cc: Joerg Roedel
Uros Bizjak (3):
asm-generic/atomic: Add try_cmpxchg64() instrumentation
locking/atomic/x86: Introduce arch_try_cmpxchg64()
KVM/VMX: Use try_cmpxchg64() in posted_intr.c
arch/x86/include/asm/cm
Instrument try_cmpxchg64() similar to try_cmpxchg().
Signed-off-by: Uros Bizjak
Cc: Will Deacon
Cc: Peter Zijlstra
Cc: Boqun Feng
---
include/asm-generic/atomic-instrumented.h | 46 ++-
scripts/atomic/gen-atomic-instrumented.sh | 2 +-
2 files changed, 46 insertions
Use try_cmpxchg64() instead of cmpxchg64() to reuse flags from
cmpxchg/cmpxchg8b instruction. For 64 bit targets flags reuse
avoids a CMP instruction, while for 32 bit targets flags reuse
avoids XOR/XOR/OR instruction sequence.
Signed-off-by: Uros Bizjak
Cc: Paolo Bonzini
Cc: Sean
Add arch_try_cmpxchg64(), similar to arch_try_cmpxchg(), that
operates with 64 bit operands. This function provides the same
interface for 32 bit and 64 bit targets.
Signed-off-by: Uros Bizjak
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: Borislav Petkov
Cc: "H. Peter Anvin"
---
arch/x
The following commit has been merged into the x86/cleanups branch of tip:
Commit-ID: ab09b58e4bdfdbcec425e54ebeaf6e209a96318f
Gitweb:
https://git.kernel.org/tip/ab09b58e4bdfdbcec425e54ebeaf6e209a96318f
Author:Uros Bizjak
AuthorDate:Thu, 29 Oct 2020 17:02:58 +01:00
Use TEST %reg,%reg which sets the zero flag in the same way
as CMP $0,%reg, but the encoding uses one byte less.
v2: Correct commit subject
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: Borislav Petkov
Cc: "H. Peter Anvin"
Reviewed-by: Andy Lutomirski
Signed-off-by: Uros Bizjak
---
Use TEST %reg,%reg which sets the zero flag in the same way
as CMP $0,%reg, but the encoding uses one byte less.
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: Borislav Petkov
Cc: "H. Peter Anvin"
Signed-off-by: Uros Bizjak
---
arch/x86/boot/compressed/head_64.S | 8
1 file
On Mon, Oct 12, 2020 at 10:57 PM Linus Torvalds
wrote:
>
> On Mon, Oct 12, 2020 at 1:22 PM Uros Bizjak wrote:
> >
> > No, this fact is not documented, although there are close to zero
> > chances it will ever change. High registers are independent from their
> >
stack behavior. The dynamic stack adjustment makes using unwind hints
> problematic.
>
> Suggested-by: Josh Poimboeuf
> Cc: Uros Bizjak
> Signed-off-by: Sean Christopherson
Acked-by: Uros Bizjak
Uros.
On Mon, Sep 14, 2020 at 11:21 PM Uros Bizjak wrote:
>
> On Mon, Sep 14, 2020 at 11:07 PM Sean Christopherson
> wrote:
> >
> > On Mon, Sep 14, 2020 at 03:40:24PM -0500, Josh Poimboeuf wrote:
> > > On Mon, Sep 14, 2020 at 12:56:33PM -0700, Sean Christopherson wrote:
VM-Exit
> > > into a proper subroutine. Slightly rework the blob so that it plays
> > > nice with objtool without any additional hints (existing hints aren't
> > > able to handle returning with a seemingly modified stack size).
> > >
> > > Suggest
> able to handle returning with a seemingly modified stack size).
>
> Suggested-by: Josh Poimboeuf
> Cc: Uros Bizjak
> Signed-off-by: Sean Christopherson
> ---
> arch/x86/kvm/vmx/vmenter.S | 28
> arch/x86/kvm/vmx/vmx.c | 33 +++
The following commit has been merged into the x86/cleanups branch of tip:
Commit-ID: eb3621798bcdd34ba480109bac357ba6a784d3e2
Gitweb:
https://git.kernel.org/tip/eb3621798bcdd34ba480109bac357ba6a784d3e2
Author:Uros Bizjak
AuthorDate:Thu, 27 Aug 2020 19:17:35 +02:00
The following commit has been merged into the x86/asm branch of tip:
Commit-ID: 767ec7289e83721fee205a13b459f12fb2cf922f
Gitweb:
https://git.kernel.org/tip/767ec7289e83721fee205a13b459f12fb2cf922f
Author:Uros Bizjak
AuthorDate:Thu, 27 Aug 2020 20:09:04 +02:00
Committer
On Thu, Aug 27, 2020 at 10:14 PM Al Viro wrote:
>
> On Thu, Aug 27, 2020 at 08:09:04PM +0200, Uros Bizjak wrote:
> > xorl %0,%0 is equivalent to xorq %0,%0 as both will zero the
> > entire register. Use xorl %0,%0 for all operand sizes to avoid
> > REX prefix byte when l
also
breaks register dependency chains, avoiding potential partial
register stalls with 8 and 16bit operands.
The patch lowers the size of .fixup section by 20 bytes.
Changes since v1:
- Rewrite commit message.
Signed-off-by: Uros Bizjak
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: Borislav Petkov
inst.h was included in calling.h solely to instantiate RDPID macro.
The usage of RDPID was removed in commit 6a3ea3e68b8a8a.
Fixes: 6a3ea3e68b8a8a ("x86/entry/64: Do not use RDPID in paranoid entry to
accomodate KVM")
Signed-off-by: Uros Bizjak
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc
%sil, %dil and %bpl 8bit registers are used.
As a bonus, 32bit XORL breaks register dependency chains, avoiding
potential partial register stalls with 8 and 16bit operands.
The patch lowers the size of .fixup section by 20 bytes.
Signed-off-by: Uros Bizjak
Cc: Thomas Gleixner
Cc: Ingo Molnar
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: 86109813990b5d6d6cfb8072382ee69d11ea9460
Gitweb:
https://git.kernel.org/tip/86109813990b5d6d6cfb8072382ee69d11ea9460
Author:Uros Bizjak
AuthorDate:Tue, 07 Jul 2020 19:47:22 +02:00
Committer
jne13b
As the compiler has some more freedom w.r.t. register allocation,
there is also a couple of reg-reg moves removed.
There are no hidden states for CRC32 insn, so there is no need to mark
assembly as volatile.
Signed-off-by: Uros Bizjak
CC: Herbert Xu
CC: "David S. Miller
jne13b
As the compiler has some more freedom w.r.t. register allocation,
there is also a couple of reg-reg moves removed.
There are no hidden states for CRC32 insn, so there is no need to mark
assembly as volatile.
v2: Introduce CRC32_INST define.
Signed-off-by: Uros Bizjak
CC
Resolves conflict with the tip tree.
CC: Herbert Xu
CC: Thomas Gleixner
CC: Ingo Molnar
CC: Borislav Petkov
CC: "H. Peter Anvin"
CC: Stephen Rothwell ,
CC: "Chang S. Bae" ,
CC: Peter Zijlstra ,
CC: Sasha Levin
Signed-off-by: Uros Bizjak
---
arch/x86/incl
On Mon, Jul 20, 2020 at 6:03 AM Stephen Rothwell wrote:
> > Please find attached the incremental patch that puts back integer
> > parts of inst.h. This resolves the conflict with the tip tree.
>
> The tip tree change needs the XMM parts kept as well, sorry.
Strange, because I did test my patch w
Please find attached the incremental patch that puts back integer
parts of inst.h. This resolves the conflict with the tip tree.
Uros.
On Fri, Jul 17, 2020 at 8:45 AM Herbert Xu wrote:
>
> On Fri, Jul 17, 2020 at 08:27:27AM +0200, Uros Bizjak wrote:
> >
> > I will prepar
On Fri, Jul 17, 2020 at 6:47 AM Stephen Rothwell wrote:
>
> Hi all,
>
> Today's linux-next merge of the tip tree got a conflict in:
>
> arch/x86/include/asm/inst.h
>
> between commit:
>
> d7866e503bdc ("crypto: x86 - Remove include/asm/inst.h")
>
> from the crypto tree and commit:
>
> eaad98
from
x86/crypto directory, and remove now unneeded file.
The patch was tested by calculating and comparing sha256sum
hashes of stripped object files before and after the patch,
to be sure that executable code didn't change.
Signed-off-by: Uros Bizjak
CC: Herbert Xu
CC: "David S. M
Current minimum required version of binutils is 2.23,
which supports XGETBV and XSETBV instruction mnemonics.
Replace the byte-wise specification of XGETBV and
XSETBV with these proper mnemonics.
Signed-off-by: Uros Bizjak
---
arch/x86/include/asm/fpu/internal.h | 7 ++-
1 file changed, 2
Current minimum required version of binutils is 2.23,
which supports VMCALL and VMMCALL instruction mnemonics.
Replace the byte-wise specification of VMCALL and
VMMCALL with these proper mnemonics.
Signed-off-by: Uros Bizjak
CC: Paolo Bonzini
---
arch/x86/include/asm/kvm_para.h | 2 +-
1 file
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: 3d81b3d1e55a518837c3d1f722c6d93abe34aa85
Gitweb:
https://git.kernel.org/tip/3d81b3d1e55a518837c3d1f722c6d93abe34aa85
Author:Uros Bizjak
AuthorDate:Fri, 08 May 2020 12:58:17 +02:00
Committer
On Tue, May 12, 2020 at 5:15 PM Borislav Petkov wrote:
>
> On Tue, May 12, 2020 at 04:26:37PM +0200, Uros Bizjak wrote:
> > Actually, the order was correct for AT&T syntax in the original patch.
> >
> > The insn template for AT&T syntax goes:
> >
> > i
On Tue, May 12, 2020 at 4:10 PM tip-bot2 for Uros Bizjak
wrote:
>
> The following commit has been merged into the x86/cpu branch of tip:
>
> Commit-ID: 7e32a9dac9926241d56851e1517c9391d39fb48e
> Gitweb:
> https://git.kernel.org/tip/7e32a9dac9926241d56851e1517c939
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: 7e32a9dac9926241d56851e1517c9391d39fb48e
Gitweb:
https://git.kernel.org/tip/7e32a9dac9926241d56851e1517c9391d39fb48e
Author:Uros Bizjak
AuthorDate:Fri, 08 May 2020 11:22:47 +02:00
Committer
Current minimum required version of binutils is 2.23,
which supports RDRAND and RDSEED instruction mnemonics.
Replace the byte-wise specification of RDRAND and
RDSEED with these proper mnemonics.
Signed-off-by: Uros Bizjak
CC: "H. Peter Anvin"
CC: Ingo Molnar
CC: Thomas Gleixner
Current minimum required version of binutils is 2.23,
which supports INVPCID instruction mnemonic.
Replace the byte-wise specification of INVPCID with
this proper mnemonic.
Signed-off-by: Uros Bizjak
CC: "H. Peter Anvin"
CC: Ingo Molnar
CC: Thomas Gleixner
---
arch/x86/include/asm
On Mon, Jul 15, 2019 at 8:41 PM Thomas Gleixner wrote:
>
> On Mon, 15 Jul 2019, Andi Kleen wrote:
> > Uros Bizjak writes:
> >
> > > Recent patch [1] disabled a self-snoop feature on a list of processor
> > > models with a known errata, so we are confident t
ype.
Note that commit #1e03bff360010
("x86/cpu/intel: Clear cache self-snoop capability in CPUs with known errata")
cleared cache self-snoop capability for CPUs where conflicting memory types
lead to unpredictable behavior, machine check errors, or hangs.
Signed-off-by: Uros Bizjak
---
a
On Mon, Jul 15, 2019 at 10:24 AM Thomas Gleixner wrote:
>
> Uros,
>
> On Thu, 11 Jul 2019, Uros Bizjak wrote:
> > Recent patch [1] disabled a self-snoop feature on a list of processor
> > models with a known errata, so we are confident that the feature
> > should wor
On Thu, Jul 11, 2019 at 4:39 PM Andy Lutomirski wrote:
>
> On Thu, Jul 11, 2019 at 1:13 AM Uros Bizjak wrote:
> >
> > Recent patch [1] disabled a self-snoop feature on a list of processor
> > models with a known errata, so we are confident that the feature
> > s
g/lkml/2009/4/8/508
Uros.
From 17cbad5d45b6ae26dbcfe02deba597c83cd63a0d Mon Sep 17 00:00:00 2001
From: Uros Bizjak
Date: Wed, 10 Jul 2019 15:01:44 +0200
Subject: [PATCH] Disable CPA cache flush for selfsnoop targets
Signed-off-by: Uros Bizjak
---
arch/x86/mm/pageattr.c | 7 ---
1 file chan
Commit-ID: 515f0453752e3daba7c47d37d9172a66509a56fd
Gitweb: https://git.kernel.org/tip/515f0453752e3daba7c47d37d9172a66509a56fd
Author: Uros Bizjak
AuthorDate: Thu, 6 Jun 2019 22:00:44 +0200
Committer: Borislav Petkov
CommitDate: Mon, 10 Jun 2019 22:36:38 +0200
x86/resctrl: Use
Depending on CONFIG_X86_64 _ASM_BX expands to either rbx or ebx.
Cc: Fenghua Yu
Cc: Reinette Chatre
Cc: x...@kernel.org
Signed-off-by: Uros Bizjak
---
arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/arch/x86/kernel/cpu/resctrl
> * Ingo Molnar wrote:
>
>> Not all GCC versions seem to like this series:
>>
>> In file included from arch/x86/mm/tlb.c:12:0:
>> arch/x86/mm/tlb.c: In function ‘switch_mm_irqs_off’:
>> ./arch/x86/include/asm/mmu_context.h:210:28: internal compiler error:
>> Segmentation fault
>> #define swi
On 12/28/18, Uros Bizjak wrote:
> Use CC_SET(z)/CC_OUT(z) instead of explicit setz instruction.
> Using these two defines, the compiler that supports generation of
> condition code outputs from inline assembly flags generates one
> conditional jump instruction, e.g:
Unfortunatel
introduces alternative_io_tail definition. This definition
can take a tail instruction, common to all alternatives. By using this
definition, it is possible to remove setz from cmpxchg16b alternatives, saved
in .altinstr_replacement section, thus saving a few bytes from the binary.
Signed-off-by: Uros
Commit-ID: 566b62a3676caed1f8c626e26066ff3ae3a38918
Gitweb: https://git.kernel.org/tip/566b62a3676caed1f8c626e26066ff3ae3a38918
Author: Uros Bizjak
AuthorDate: Sun, 14 Oct 2018 22:23:54 +0200
Committer: Borislav Petkov
CommitDate: Mon, 5 Nov 2018 10:42:32 +0100
x86: Use POPCNT
x86_64 and i386 version of the kernel and comparing
objdump dumps of the pathced and unpatched vmlinux.o. They were the same.
v2: Update commit message to emphasize removal of #defines.
Signed-off-by: Uros Bizjak
---
arch/x86/include/asm/arch_hweight.h | 12
1 file changed, 4
On Sun, Oct 14, 2018 at 10:02 PM Borislav Petkov wrote:
>
> On Sun, Oct 14, 2018 at 09:15:00PM +0200, Uros Bizjak wrote:
> > The ChangeLog says "real INSTRUCTION mnemonics", e.g. POPCNTQ and POPCNTL.
>
> Right, INSTRUCTION.
>
> > The compiler will genera
On Sun, Oct 14, 2018 at 8:47 PM Borislav Petkov wrote:
>
> On Sun, Oct 14, 2018 at 08:35:10PM +0200, Uros Bizjak wrote:
> > Recently the minimum required version of binutils was changed to 2.20,
> > which supports popcnt instruction mnemonics. The patch removes
> > all
and unpatched vmlinux.o. They were the same.
Signed-off-by: Uros Bizjak
---
arch/x86/include/asm/arch_hweight.h | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/arch/x86/include/asm/arch_hweight.h
b/arch/x86/include/asm/arch_hweight.h
index 34a10b2d5b73
Commit-ID: c808c09b527cd60d9a0d53799935f75e2452174d
Gitweb: https://git.kernel.org/tip/c808c09b527cd60d9a0d53799935f75e2452174d
Author: Uros Bizjak
AuthorDate: Fri, 28 Sep 2018 10:33:05 +0200
Committer: Borislav Petkov
CommitDate: Mon, 1 Oct 2018 13:46:32 +0200
x86/asm: Use CC_SET
On Mon, Oct 1, 2018 at 1:35 PM Borislav Petkov wrote:
>
> On Mon, Oct 01, 2018 at 01:03:47PM +0200, Uros Bizjak wrote:
> > Looks like gmail forward mangled whitespace. The original, archived at
> > Patchwork [1] passes checkpatch without problems.
> >
> > [1]
> &
On Mon, Oct 1, 2018 at 12:28 PM Borislav Petkov wrote:
>
> On Fri, Sep 28, 2018 at 10:33:05AM +0200, Uros Bizjak wrote:
> > Remove open-coded uses of set instructions to use CC_SET()/CC_OUT()
> > for __cmpxchg_double.
> >
> > Signed-off-by: Uros Bizjak
> > ---
Remove open-coded uses of set instructions to use CC_SET()/CC_OUT()
for __cmpxchg_double.
Signed-off-by: Uros Bizjak
---
arch/x86/include/asm/cmpxchg.h | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/x86/include/asm/cmpxchg.h b/arch/x86/include/asm/cmpxchg.h
Commit-ID: 26e609eccd37967d3681662433086894830c5d62
Gitweb: https://git.kernel.org/tip/26e609eccd37967d3681662433086894830c5d62
Author: Uros Bizjak
AuthorDate: Tue, 14 Aug 2018 18:59:51 +0200
Committer: Thomas Gleixner
CommitDate: Thu, 30 Aug 2018 13:02:31 +0200
x86/asm: Use CC_SET
Remove open-coded uses of set instructions to use CC_SET()/CC_OUT() for
__cmpxchg_double.
Signed-off-by: Uros Bizjak
---
arch/x86/include/asm/cmpxchg.h | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/x86/include/asm/cmpxchg.h b/arch/x86/include/asm/cmpxchg.h
Remove open-coded uses of set instructions to use CC_SET()/CC_OUT() in
arch/x86/include/asm/signal.h.
Signed-off-by: Uros Bizjak
---
arch/x86/include/asm/signal.h | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/signal.h b/arch/x86/include/asm
Commit-ID: 216a37202f10b7d78f2f98e26a6681f367165f05
Gitweb: https://git.kernel.org/tip/216a37202f10b7d78f2f98e26a6681f367165f05
Author: Uros Bizjak
AuthorDate: Fri, 29 Jun 2018 16:28:44 +0200
Committer: Thomas Gleixner
CommitDate: Thu, 2 Aug 2018 14:30:42 +0200
x86/boot: Use CC_SET
Remove open-coded uses of set instructions to use CC_SET()/CC_OUT() in
arch/x86/boot/.
Signed-off-by: Uros Bizjak
---
arch/x86/boot/bitops.h | 3 ++-
arch/x86/boot/string.c | 5 +++--
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/x86/boot/bitops.h b/arch/x86/boot/bitops.h
s the value in the register.
Signed-off-by: Uros Bizjak
Cc: x...@kernel.org
---
arch/x86/include/asm/percpu.h | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/percpu.h b/arch/x86/include/asm/percpu.h
index a06b07399d17..e9202a0de8f0 100644
--- a/arch/x86/in
Commit-ID: 3c52b5c64326d9dcfee4e10611c53ec1b1b20675
Gitweb: http://git.kernel.org/tip/3c52b5c64326d9dcfee4e10611c53ec1b1b20675
Author: Uros Bizjak
AuthorDate: Wed, 6 Sep 2017 17:18:08 +0200
Committer: Ingo Molnar
CommitDate: Sun, 24 Sep 2017 11:19:01 +0200
x86/asm: Remove unnecessary
There is no need for \n\t in front of CC_SET, CC_SET already includes these two.
Cc: x...@kernel.org
Signed-off-by: Uros Bizjak
---
arch/x86/include/asm/archrandom.h | 8
arch/x86/include/asm/bitops.h | 10 +-
arch/x86/include/asm/percpu.h | 2 +-
arch/x86/include/asm
On Mon, Jul 27, 2015 at 9:04 PM, H. Peter Anvin wrote:
> I wonder if using "set" would be a performance regression over "sbb" for
> the existing bitops, in which case it would slot quite nicely into this
> scheme.
As far as I have looked into the compiled code, following sequence was
produced wh
From: Uros Bizjak
This patch introduces GCC ASM flags to bitops.
The new functionality depends on __GCC_ASM_FLAG_OUTPUTS__ preprocessor
symbol, which is automatically set by GCC version 6 or later when
ASM flags feature is supported.
The improvement can be illustrated with following code
On Mon, Jul 27, 2015 at 5:54 PM, Ingo Molnar wrote:
>
> * Uros Bizjak wrote:
>
>> On Mon, Jul 27, 2015 at 5:40 PM, Ingo Molnar wrote:
>> >
>> > * Uros Bizjak wrote:
>> >
>> >> From: Uros Bizjak
>> >>
>> >> This
On Mon, Jul 27, 2015 at 5:40 PM, Ingo Molnar wrote:
>
> * Uros Bizjak wrote:
>
>> From: Uros Bizjak
>>
>> This patch introduces GCC ASM flags to bitops. Instead of e.g.
>>
>>136d7: 48 0f a3 3d 00 00 00bt %rdi,0x0(%rip)
>
From: Uros Bizjak
This patch introduces GCC ASM flags to bitops. Instead of e.g.
136d7: 48 0f a3 3d 00 00 00bt %rdi,0x0(%rip)
136de: 00
136df: 19 ff sbb%edi,%edi
136e1: 85 ff test %edi,%edi
136e3: 0f
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