: Steffen Trumtrar
---
drivers/net/virtio_net.c| 13 -
include/uapi/linux/virtio_net.h | 1 +
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c
index 4065834957fbd..fb3572074e8b8 100644
--- a/drivers/net/virtio_net.c
ff-by: Steffen Trumtrar
---
Willem de Bruijn (4):
virtio-net: support transmit hash report
virtio-net: support receive timestamp
virtio-net: support transmit timestamp
virtio-net: support future packet transmit time
drivers/net/virtio_net.c
onvert virtioXX_to_cpu to leXX_to_cpu
- convert reserved to __u32
Signed-off-by: Willem de Bruijn
Co-developed-by: Steffen Trumtrar
Signed-off-by: Steffen Trumtrar
--
Changes to original RFCv2
- move virtio_net_hdr_v1 into hash-struct
---
drivers/net/virtio_net.c
= SOF_TIMESTAMPING_RAW_HARDWARE |
+ do_test(family, SOF_TIMESTAMPING_TX_HARDWARE);
Signed-off-by: Willem de Bruijn
Co-developed-by: Steffen Trumtrar
Signed-off-by: Steffen Trumtrar
--
Changes to original RFC v2:
- append write-able descriptor for TX timestamp
Signed-off-by: Steffen Trumtrar
---
drivers
and driver is future work.
Changes RFC->RFCv2
- drop unused VIRTIO_NET_HASH_STATE_TIMEOUT_BIT
- convert from cpu_to_virtioXX to cpu_to_leXX
Signed-off-by: Willem de Bruijn
Signed-off-by: Steffen Trumtrar
---
drivers/net/virtio_net.c| 26 +++---
include/uapi/linux/v
From: Tim Sander
Add the reset signals for the i2c controllers on Cyclone5-based
SoCFPGA boards to the dtsi.
Signed-off-by: Tim Sander
Signed-off-by: Steffen Trumtrar
---
arch/arm/boot/dts/socfpga.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/socfpga.dtsi b
rrect the way it is or not?
> fpga_bridge1: fpga_bridge@ff50 {
> diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
> b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
> index 155829f..f99576b 100644
> --- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
> +++ b/a
n the
preloader and the OS. These 8 registers can be used to store any
information. The contents of these registers have no impact on the
state of the HPS hardware"
If it is already agreed upon, that a bridge-enable property is okay,
why not add a port-enable property, too?
Regards,
Steffen
ng to be compatible
with all users.
Signed-off-by: Steffen Trumtrar
Cc: Wim Van Sebroeck
Cc: Guenter Roeck
Cc: linux-watch...@vger.kernel.org
---
drivers/watchdog/dw_wdt.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/watchdog/dw_wdt.c b/drivers/watchdog/dw_wdt.c
Document the reset lines holding the watchdog core in reset.
Signed-off-by: Steffen Trumtrar
Cc: Wim Van Sebroeck
Cc: Rob Herring
Cc: Mark Rutland
Cc: linux-watch...@vger.kernel.org
Cc: devicet...@vger.kernel.org
---
Documentation/devicetree/bindings/watchdog/dw_wdt.txt | 5 +
1 file
The only way of stopping the watchdog is by resetting it.
Add the watchdog op for stopping the device and reset if
a reset line is provided.
Signed-off-by: Steffen Trumtrar
Cc: Wim Van Sebroeck
Cc: Guenter Roeck
Cc: linux-watch...@vger.kernel.org
---
drivers/watchdog/dw_wdt.c | 16
supported, so add the stop operation to the watchdog
ops.
Tested on the SoCFPGA platform.
Regards,
Steffen
Steffen Trumtrar (3):
watchdog: bindings: dw_wdt: add reset lines
watchdog: dw_wdt: get reset lines from dt
watchdog: dw_wdt: add stop watchdog operation
.../devicetree/bindings
Hi Tim!
On Thu, Feb 25, 2016 at 11:05:05AM +0100, Tim Sander wrote:
> From: Tim Sander
>
> Add a more specific compatible string:"terasic,de0-nano-soc" for respective
> board.
> Background: when checking for bootspec entries, some board specific fixups are
> not apropriate for board of the same
On Tue, Oct 27, 2015 at 05:09:15PM -0500, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> Supports Altera SOCFPGA bridges:
> * fpga2sdram
> * fpga2hps
> * hps2fpga
> * lwhps2fpga
>
> Allows enabling/disabling the bridges through the FPGA
> Bridge Framework API functions.
>
> The fp
On Tue, Oct 27, 2015 at 05:09:13PM -0500, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> This framework adds API functions for enabling/
> disabling FPGA bridges under kernel control.
>
> This allows the Linux kernel to disable FPGA bridges
> during FPGA reprogramming and to enable FPG
On Tue, Oct 27, 2015 at 05:09:12PM -0500, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> The Simple FPGA bus uses the FPGA Manager Framework and the
> FPGA Bridge Framework to provide a manufactorer-agnostic
> interface for reprogramming FPGAs that is Device Tree
> Overlays-based.
>
>
On Tue, Oct 27, 2015 at 05:09:11PM -0500, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> New bindings document for simple fpga bus.
>
> Signed-off-by: Alan Tull
> ---
> v9: initial version added to this patchset
> v10: s/fpga/FPGA/g
> replace DT overlay example with slightly mor
Hi!
On Tue, Oct 27, 2015 at 05:09:14PM -0500, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> Add bindings documentation for Altera SOCFPGA bridges:
> * fpga2sdram
> * fpga2hps
> * hps2fpga
> * lwhps2fpga
>
> Signed-off-by: Alan Tull
> Signed-off-by: Dinh Nguyen
> Signed-off-by:
Hi!
On Tue, Oct 27, 2015 at 05:09:11PM -0500, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> New bindings document for simple fpga bus.
>
> Signed-off-by: Alan Tull
> ---
> v9: initial version added to this patchset
> v10: s/fpga/FPGA/g
> replace DT overlay example with slightl
Hi!
On Tue, Oct 13, 2015 at 09:46:15PM +0200, atull wrote:
> On Tue, 13 Oct 2015, Dinh Nguyen wrote:
>
> > On Tue, 13 Oct 2015, Steffen Trumtrar wrote:
> >
> > > Hi Alan!
> > >
> > > On Tue, Oct 13, 2015 at 01:28:20PM -0500, at...@opensource.alt
On Tue, Oct 13, 2015 at 02:51:28PM -0500, Dinh Nguyen wrote:
> On Tue, 13 Oct 2015, at...@opensource.altera.com wrote:
>
> > From: Alan Tull
> >
> > Add FPGA manager to device tree for SoCFPGA.
> >
> > Signed-off-by: Alan Tull
> > ---
> > v2: Remove 0x after @
> > No caps in hex numbers
>
On Tue, Oct 13, 2015 at 02:18:22PM -0500, Dinh Nguyen wrote:
> On Tue, 13 Oct 2015, Steffen Trumtrar wrote:
>
> > Hi Alan!
> >
> > On Tue, Oct 13, 2015 at 01:28:20PM -0500, at...@opensource.altera.com wrote:
> > > From: Alan Tull
> > >
> &g
Hi Alan!
On Tue, Oct 13, 2015 at 01:28:20PM -0500, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> Add FPGA manager to device tree for SoCFPGA.
>
> Signed-off-by: Alan Tull
> ---
> arch/arm/boot/dts/socfpga.dtsi | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/ar
Hi!
On Fri, Jul 17, 2015 at 04:22:07PM -0500, atull wrote:
> On Fri, 17 Jul 2015, Steffen Trumtrar wrote:
>
> > Hi!
> >
> > On Fri, Jul 17, 2015 at 10:51:13AM -0500, at...@opensource.altera.com wrote:
> > > From: Alan Tull
> > >
>
Hi!
On Fri, Jul 17, 2015 at 10:51:13AM -0500, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> New bindings document for simple fpga bus.
>
> Signed-off-by: Alan Tull
> ---
> .../Documentation/bindings/simple-fpga-bus.txt | 61
>
> 1 file changed, 61 insert
; reg = <0x53>;
>
> - interrupt-parent = < &portc >;
> + interrupt-parent = <&portc>;
> interrupts = <3 2>;
> };
> };
I would personally squash 3/3 into this one, but otherwise:
Whole seri
Hi!
On Tue, Jun 16, 2015 at 03:27:54AM +, Victoria Milhoan wrote:
> All,
>
> Freescale has been adding i.MX6 support to the CAAM driver and testing on
> both i.MX6 and QorIQ platforms. The patch series is now available for review.
> Your feedback for the provided patches is appreciated.
>
: Steffen Trumtrar
---
This patch is only compile-tested for PowerPC and tested on ARM.
According to the datasheets for i.MX6 and P1010 this should be correct, though.
drivers/crypto/caam/regs.h | 38 +++---
1 file changed, 19 insertions(+), 19 deletions(-)
diff
Hi!
On Mon, Jun 15, 2015 at 05:28:16PM +0100, Russell King - ARM Linux wrote:
> On Mon, Jun 15, 2015 at 05:59:07PM +0200, Steffen Trumtrar wrote:
> > I'm working on CAAM support for the ARM-based i.MX6 SoCs. The current
> > drivers/crypto/caam driver only works for PowerPC
r anything else in the
jr driver, so maybe that is not optimal. On the other hand the sizeof(..)
solution would only catch little endian on 32bit and not big endian (?!)
I however don't know what combinations actually *have* to be caught, as I don't
know, which exist.
So,
4x";
> + reg = <0x53>;
> +
> + interrupt-parent = <&portc>;
> + interrupts = <3 2>;
> + };
> +};
> +
> &mmc0 {
> vmmc-supply = <®ulator_3_3v>;
> vqmmc-supply = <®ulator_3_3
Hi!
On Tue, Dec 23, 2014 at 10:04:22AM -0300, Walter Lozano wrote:
> This patch adds the DTS bindings for the adxl34x digital
> accelerometer.
>
Thanks for doing this. Does the ADXL34 work now? Last time I
tried it, I didn't get any interrupts, but as I didn't really
care for the accelerometer I
On Fri, Dec 19, 2014 at 09:55:34AM -0600, atull wrote:
> On Fri, 19 Dec 2014, Steffen Trumtrar wrote:
>
> > On Fri, Dec 19, 2014 at 03:05:50PM +0100, Michal Simek wrote:
> > > On 12/19/2014 09:55 AM, Steffen Trumtrar wrote:
> > > > Hi!
> >
On Fri, Dec 19, 2014 at 03:05:50PM +0100, Michal Simek wrote:
> On 12/19/2014 09:55 AM, Steffen Trumtrar wrote:
> > Hi!
> >
> > Just a minor nitpick, but...
> >
> > On Thu, Dec 18, 2014 at 04:29:08PM -0600, at...@opensource.altera.com wrote:
> >> Fro
Hi!
Just a minor nitpick, but...
On Thu, Dec 18, 2014 at 04:29:08PM -0600, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> Add driver to fpga manager framework to allow configuration
> of FPGA in Altera SoCFPGA parts.
>
> Signed-off-by: Alan Tull
> Acked-by: Michal Simek
> ---
> v2:
On Wed, Dec 10, 2014 at 11:25:59AM -0600, atull wrote:
> On Wed, 10 Dec 2014, Steffen Trumtrar wrote:
>
> > Hi!
> >
> > On Tue, Dec 09, 2014 at 02:14:46PM -0600, at...@opensource.altera.com wrote:
> > > From: Alan Tull
> > >
> > > Add Altera F
On Tue, Dec 09, 2014 at 02:14:50PM -0600, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> Add driver to fpga manager framework to allow configuration
> of FPGA in Altera SoC FPGA parts.
>
> Signed-off-by: Alan Tull
> ---
> v2: fpga_manager struct now contains struct device
> fpga_m
Hi!
On Tue, Dec 09, 2014 at 02:14:46PM -0600, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> Add Altera FGPA manager to device tree.
>
> Signed-off-by: Alan Tull
> ---
> arch/arm/boot/dts/socfpga.dtsi | 10 ++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm/b
drivers/Kconfig sources drivers/soc/Kconfig twice.
Remove the last include.
Signed-off-by: Steffen Trumtrar
---
drivers/Kconfig | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 694d5a70d6ce..2683e633c027 100644
--- a/drivers/Kconfig
+++ b/drivers
On Wed, Oct 29, 2014 at 10:16:32AM +, Mark Brown wrote:
> On Wed, Oct 29, 2014 at 08:57:01AM +0100, Steffen Trumtrar wrote:
>
> > So, that shouldn't be a problem though, as I already cooked up a driver for
> > the L3 with all the ranges specified. The only thi
Hi!
On Tue, Oct 28, 2014 at 04:19:03PM -0500, atull wrote:
> On Fri, 24 Oct 2014, Steffen Trumtrar wrote:
>
> > Hi!
> >
>
> Hi,
>
> I see that my documentation sucks and needs cleanup. I'll try to
> answer some of the flames and get a more coherent v
On Mon, Oct 27, 2014 at 05:45:03PM +0200, Pantelis Antoniou wrote:
> Hi Stefan,
>
> > On Oct 27, 2014, at 17:32 , Steffen Trumtrar
> > wrote:
> >
> > On Mon, Oct 27, 2014 at 05:05:29PM +0200, Pantelis Antoniou wrote:
> >> Hi Mark,
> >>
>
On Mon, Oct 27, 2014 at 05:52:02PM +0200, Pantelis Antoniou wrote:
> Hi Steffen,
>
> > On Oct 27, 2014, at 17:23 , Steffen Trumtrar
> > wrote:
> >
> > Hi!
> >
> > On Mon, Oct 27, 2014 at 01:54:20PM +0200, Pantelis Antoniou wrote:
> >> Hi Stef
On Mon, Oct 27, 2014 at 05:05:29PM +0200, Pantelis Antoniou wrote:
> Hi Mark,
>
> > On Oct 27, 2014, at 17:01 , Mark Brown wrote:
> >
> > On Mon, Oct 27, 2014 at 01:48:02PM +0200, Pantelis Antoniou wrote:
> >>> On Oct 24, 2014, at 02:51 , at...@opensource.altera.com wrote:
> >
> >>> + - init-va
Hi!
On Mon, Oct 27, 2014 at 01:54:20PM +0200, Pantelis Antoniou wrote:
> Hi Stefen,
>
> > On Oct 25, 2014, at 17:42 , Steffen Trumtrar
> > wrote:
> >
> > Hi Pantelis!
> >
> > On Fri, Oct 24, 2014 at 12:20:53PM +0300, Pantelis Antoniou wrote:
> &
Hi Pantelis!
On Fri, Oct 24, 2014 at 12:20:53PM +0300, Pantelis Antoniou wrote:
> Hi Stefan, Allan,
>
> Sorry, haven’t had a chance to review all this yet; will do so in the weekend.
> Just wanted to pop in and comment on a few things.
>
> > On Oct 24, 2014, at 10:00
Hi!
On Thu, Oct 23, 2014 at 06:51:06PM -0500, at...@opensource.altera.com wrote:
> From: Alan Tull
(...)
> diff --git
> a/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt
> b/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt
> new file mode 100644
> index
Hi!
On Tue, Oct 14, 2014 at 01:45:29PM -0500, atull wrote:
> The FPGA bridge driver that I submitted last year handled the following
> things:
> * The bridges might have been brought out of reset in the bootloader. Some
>of the bridges have write-only registers (!) so this information had to
Hi!
On Thu, Oct 09, 2014 at 09:57:49AM -0500, atull wrote:
> On Thu, 9 Oct 2014, Steffen Trumtrar wrote:
>
> > On Thu, Oct 09, 2014 at 08:16:18AM -0500, Dinh Nguyen wrote:
> > > Hi Philipp,
> > >
> > > On 10/9/14, 4:03 AM, Philipp Zabel wrote:
> >
On Thu, Oct 09, 2014 at 08:16:18AM -0500, Dinh Nguyen wrote:
> Hi Philipp,
>
> On 10/9/14, 4:03 AM, Philipp Zabel wrote:
> > Am Mittwoch, den 08.10.2014, 21:44 -0500 schrieb
> > dingu...@opensource.altera.com:
> >> From: Dinh Nguyen
> >>
> >> There are certain drivers that are required to get loa
The ds2482-101 version of the chip has an active-low sleep pin. Add this as a
gpio to the probe function and describe the DT binding accordingly.
Signed-off-by: Steffen Trumtrar
---
Changes since v1:
- rebased to next-20141001
Documentation/devicetree/bindings/w1/ds2482.txt | 18
Hi!
On Wed, Sep 24, 2014 at 03:27:29PM -0500, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> Add code that requests that the sdr controller go into
> self-refresh mode. This code is run from ocram.
>
> This patch assumes that u-boot has already configured sdr:
> sdr.ctrlcfg.lowpwre
Hi!
On Wed, Sep 24, 2014 at 02:09:14PM -0700, Sören Brinkmann wrote:
> Hi,
>
> I think I have pinctrl driver that is covering the pinmux options of
> Zynq and I also figured out how the DT bindings work.
>
> But there are a couple of things that probably could be done better.
>
> One thing maki
On Fri, Aug 15, 2014 at 11:47:09AM -0500, Thor Thayer wrote:
> Hi Steffen!
>
> Building on Alan's points, I don't see the reference to the child
> nodes in the syscon.txt binding documentation - can you point out
> what I'm missing?
>
> I based this patch on other examples of syscon, and there ar
On Fri, Aug 15, 2014 at 11:07:31AM -0500, atull wrote:
> On Fri, 15 Aug 2014, Steffen Trumtrar wrote:
>
> >
> > Hi!
>
> Hello
>
> Thanks for the feedback...
>
> >
> > ttha...@opensource.altera.com writes:
> >
> > > From: Thor Thaye
t the different regions of the
SDR (EDAC, FPGAPORTRST, ...) at least be child nodes of the syscon?
That seems to match the syscon binding and describes the actual hardware
better IMHO.
Oh, and "reg = <...>" for the sdram-edac, maybe ?
How would I know where the start address of the EDAC
Hi!
On Fri, Aug 01, 2014 at 05:27:57PM -0500, Thor Thayer wrote:
>
> On 08/01/2014 03:13 AM, Lee Jones wrote:
> >On Thu, 31 Jul 2014, Thor Thayer wrote:
> >>On 07/31/2014 03:26 AM, Lee Jones wrote:
> >>>On Wed, 30 Jul 2014, ttha...@opensource.altera.com wrote:
[...]
> +u32 altera_sdr_readl(
Hi!
As you touch clk.c, you should Cc
Mike Turquette
He is the maintainer for that code.
Regards,
Steffen
--
Pengutronix e.K. | Steffen Trumtrar|
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137
The ds2482-101 version of the chip has an active-low sleep pin. Add this as a
gpio to the probe function and describe the DT binding accordingly.
If the pin wouldn't be added and pulled high, the device would not be able to
be probed.
Signed-off-by: Steffen Trumtrar
---
Documentation/devic
teffen
--
Pengutronix e.K. | Steffen Trumtrar|
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- |
--
To unsubscribe fr
On Sun, Jun 22, 2014 at 01:31:02PM -0500, Thor Thayer wrote:
> On Sat, Jun 21, 2014 at 4:04 AM, Steffen Trumtrar
> wrote:
> > Hi!
> >
> > On Fri, Jun 20, 2014 at 06:22:01PM -0500, ttha...@altera.com wrote:
> >> From: Thor Thayer
> >>
> >> A
On Fri, Jun 20, 2014 at 06:22:02PM -0500, ttha...@altera.com wrote:
> From: Thor Thayer
>
> Addition of the Altera SDRAM EDAC bindings and device tree changes
>
> v2: Changes to SoC EDAC source code.
>
> v3: Fix typo in device tree documentation.
>
> v4,v5: No changes - bump version for consis
Hi!
On Fri, Jun 20, 2014 at 06:22:01PM -0500, ttha...@altera.com wrote:
> From: Thor Thayer
>
> Addition of the Altera SDRAM Controller bindings and device tree changes.
>
> v2: Changes to SoC SDRAM EDAC code.
>
> v3: Implement code suggestions for SDRAM EDAC code.
>
> v4: Remove syscon from
Allow probing the dw-mmio from devicetree.
Signed-off-by: Steffen Trumtrar
---
Changes since v2:
- rebase to spi-v3.16
- add cs-gpios to optional properties
Changes since v1:
- num-chipselect -> num-cs
- snps,dw-spi-mmio -> snps,dw-apb-ssi
.../devi
On Tue, May 27, 2014 at 03:57:47PM -0500, Alan Tull wrote:
> On Tue, May 27, 2014 at 2:42 PM, Steffen Trumtrar
> wrote:
> > On Tue, May 27, 2014 at 02:12:17PM -0500, Alan Tull wrote:
> >> On Tue, May 27, 2014 at 2:11 AM, Steffen Trumtrar
> >> wrote:
> >&g
On Tue, May 27, 2014 at 01:00:32PM -0500, Thor Thayer wrote:
> On Tue, May 27, 2014 at 2:11 AM, Steffen Trumtrar
> wrote:
> > On Wed, May 21, 2014 at 10:38:34AM -0500, Thor Thayer wrote:
> >> On Tue, May 20, 2014 at 9:44 AM, Steffen Trumtrar
> >> wrote:
> >
On Tue, May 27, 2014 at 02:12:17PM -0500, Alan Tull wrote:
> On Tue, May 27, 2014 at 2:11 AM, Steffen Trumtrar
> wrote:
> > On Wed, May 21, 2014 at 10:38:34AM -0500, Thor Thayer wrote:
> >> On Tue, May 20, 2014 at 9:44 AM, Steffen Trumtrar
> >> wrote:
> >
On Wed, May 21, 2014 at 10:38:34AM -0500, Thor Thayer wrote:
> On Tue, May 20, 2014 at 9:44 AM, Steffen Trumtrar
> wrote:
> > Hi!
> >
> > On Tue, May 20, 2014 at 09:31:06AM -0500, Alan Tull wrote:
> >> On Mon, May 19, 2014 at 2:37 PM, Thor Thayer
> &
Allow probing the dw-mmio from devicetree.
Signed-off-by: Steffen Trumtrar
---
Changes since v1:
- num-chipselect -> num-cs
- snps,dw-spi-mmio -> snps,dw-apb-ssi
.../devicetree/bindings/spi/snps,dw-apb-ssi.txt| 25 ++
drivers/spi/spi-dw-
Hi!
On Tue, May 20, 2014 at 09:31:06AM -0500, Alan Tull wrote:
> On Mon, May 19, 2014 at 2:37 PM, Thor Thayer wrote:
>
> >>> >> diff --git
> >>> >> a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt
> >>> >> b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt
> >>> >
Hi Thor!
On Mon, May 19, 2014 at 01:36:30PM -0500, Thor Thayer wrote:
> On Fri, May 16, 2014 at 2:53 AM, Steffen Trumtrar
> wrote:
> > Hi!
> >
> > On Thu, May 15, 2014 at 11:04:49AM -0500, ttha...@altera.com wrote:
> >> From: Thor Thayer
> >>
&g
Hi!
On Thu, May 15, 2014 at 11:04:49AM -0500, ttha...@altera.com wrote:
> From: Thor Thayer
>
> Addition of the Altera SDRAM controller bindings and device
> tree changes to the Altera SoC project.
>
> v2: Changes to SoC SDRAM EDAC code.
>
> v3: Implement code suggestions for SDRAM EDAC code.
end-email-dingu...@altera.com
Regards,
Steffen
--
Pengutronix e.K. | Steffen Trumtrar|
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686
On Tue, Apr 08, 2014 at 09:29:50AM -0500, Thor Thayer wrote:
> On Tue, 2014-04-08 at 15:38 +0200, Steffen Trumtrar wrote:
> > Hi!
> >
> > On Mon, Apr 07, 2014 at 04:54:07PM -0500, ttha...@altera.com wrote:
> > > From: Thor Thayer
> > >
> > > Addi
Hi!
On Mon, Apr 07, 2014 at 04:54:07PM -0500, ttha...@altera.com wrote:
> From: Thor Thayer
>
> Addition of the Altera SDRAM controller bindings and device
> tree changes to the Altera SoC project.
>
> Signed-off-by: Thor Thayer
> To: Rob Herring
> To: Pawel Moll
> To: Mark Rutland
> To: Ia
On Tue, Apr 08, 2014 at 11:45:25AM +0100, Mark Rutland wrote:
> On Mon, Apr 07, 2014 at 10:54:09PM +0100, ttha...@altera.com wrote:
> > From: Thor Thayer
> >
> > Added EDAC support for reporting ECC errors of CycloneV
> > and ArriaV SDRAM controller.
> > - The SDRAM Controller registers are used
Hi!
On Mon, Apr 07, 2014 at 11:10:12AM -0600, Jason Gunthorpe wrote:
> On Mon, Apr 07, 2014 at 02:24:07PM +0200, Michal Simek wrote:
>
> > Device-tree BSP and in 2014.01 there will be new BSP which just
> > generate them directly from the Vivado tools which just target your
> > reference design.
Hi!
On Sun, Apr 06, 2014 at 11:19:41AM +0800, Axel Lin wrote:
> This driver is replaced by pwm-pca9685 driver and there is no user uses this
> driver in current tree. So remove it.
>
> Signed-off-by: Axel Lin
> ---
> Hi,
> I found there is a modalias conflict between leds-pca9685.ko and
> pwm-p
Hi!
On Tue, Apr 01, 2014 at 03:11:41PM -0500, Thor Thayer - Sendmail wrote:
> On Tue, 2014-04-01 at 07:28 +0200, Steffen Trumtrar wrote:
> > Hi!
> >
> > On Mon, Mar 31, 2014 at 05:07:06PM -0500, ttha...@altera.com wrote:
> > > From: Thor Thayer
> > &
On Mon, Mar 31, 2014 at 05:07:07PM -0500, ttha...@altera.com wrote:
> From: Thor Thayer
>
> Addition of the Altera SDRAM controller registers to the
> Altera SoC project. These registers are shared by future
> drivers such as ECC and the FPGA bridge.
>
> Signed-off-by: Thor Thayer
> To: Rob Her
Hi!
On Mon, Mar 31, 2014 at 05:07:06PM -0500, ttha...@altera.com wrote:
> From: Thor Thayer
>
> Addition of the Altera SDRAM controller bindings and device
> tree changes to the Altera SoC project.
>
> Signed-off-by: Thor Thayer
> To: Rob Herring
> To: Pawel Moll
> To: Mark Rutland
> To: Ia
Hi!
On Fri, Mar 14, 2014 at 04:26:14PM +, Mark Brown wrote:
> On Fri, Mar 14, 2014 at 04:14:03PM +, Mark Rutland wrote:
>
> > > +Synopsys DesignWare SPI master controller.
> > > +
> > > +Required properties:
> > > +- compatible : "snps,dw-spi-mmio"
>
> > Is there not a better name than "
Allow probing the dw-mmio from devicetree.
Signed-off-by: Steffen Trumtrar
---
This was tested on Socfpga and v3.14-rc6
.../devicetree/bindings/spi/spi-dw-mmio.txt| 25 ++
drivers/spi/spi-dw-mmio.c | 19 +++-
2 files changed, 43
On Sat, Mar 08, 2014 at 01:57:36PM +0200, Kalle Valo wrote:
> Hi Steffen,
>
> Steffen Trumtrar writes:
>
> >> > Does the patch below help? It would also fix the corruption with
> >> > scat_q_depth. Please note that I have only compile tested it. And I mig
Hi!
On Fri, Nov 29, 2013 at 06:02:11AM +, Hui Liu wrote:
> > -Original Message-
> > From: Kalle Valo [mailto:kv...@qca.qualcomm.com]
> > Sent: Tuesday, November 26, 2013 6:40 PM
> > To: Liu Hui-R64343
> > Cc: linux-arm-ker...@lists.infradead.org; linvi...@tuxdriver.com; linux-
> > wire
On Thu, Jan 30, 2014 at 03:15:11PM -0600, delicious quinoa wrote:
> On Thu, Jan 30, 2014 at 2:50 PM, Steffen Trumtrar
> wrote:
> > Hi!
> >
> > On Thu, Jan 30, 2014 at 01:40:04PM -0600, delicious quinoa wrote:
> >> On Thu, Dec 12, 2013 at 3:08 AM, Steffen Trumtra
Hi!
On Thu, Jan 30, 2014 at 01:40:04PM -0600, delicious quinoa wrote:
> On Thu, Dec 12, 2013 at 3:08 AM, Steffen Trumtrar
> wrote:
>
> > Second: The interrupt is registered as "GIC 37", which is a real interrupt
> > on
> > the Socfpga. I would expect it to
Hi Alan!
On Wed, Dec 11, 2013 at 02:15:25PM -0600, delicious quinoa wrote:
> On Fri, Dec 6, 2013 at 3:09 PM, Alan Tull wrote:
> > From: Alan Tull
> >
> > Hi Linus,
> >
> > If you don't have any further comments, can you take this patch?
> >
> > Alan
>
> Basically, this is a driver that Jamie wr
On Mon, Aug 26, 2013 at 08:16:29AM -0700, Sören Brinkmann wrote:
> On Mon, Aug 26, 2013 at 02:53:35PM +0200, Sebastian Hesselbarth wrote:
> > On 08/26/13 14:07, Steffen Trumtrar wrote:
> > >On Mon, Aug 26, 2013 at 01:15:11PM +0200, Michal Simek wrote:
> > >>I ag
Hi Michal,
On Mon, Aug 26, 2013 at 05:14:25PM +0200, Michal Simek wrote:
> Steffen: Can you point me to that floading patches? If they are useful
> we can try them and help with pushing them to the mainline.
> I don't think that there is any reasonable solution without using these
> patches.
>
I
Hi Michal!
On Mon, Aug 26, 2013 at 01:15:11PM +0200, Michal Simek wrote:
> On 08/23/2013 09:32 AM, Steffen Trumtrar wrote:
> > Hi!
> >
> > On Thu, Aug 22, 2013 at 05:59:36PM -0700, Sören Brinkmann wrote:
> >> On Thu, Aug 22, 2013 at 05:26:47PM -0700, Sören Brink
On Fri, Aug 23, 2013 at 09:00:23AM -0700, Sören Brinkmann wrote:
> Hi Steffen,
>
> On Fri, Aug 23, 2013 at 09:32:50AM +0200, Steffen Trumtrar wrote:
> > Hi!
> >
> > On Thu, Aug 22, 2013 at 05:59:36PM -0700, Sören Brinkmann wrote:
> > > On Thu, Aug 22, 2013
On Fri, Aug 23, 2013 at 07:44:03PM +0200, Sebastian Hesselbarth wrote:
> On 08/23/13 19:19, Sören Brinkmann wrote:
> >On Fri, Aug 23, 2013 at 11:30:18AM +0200, Sebastian Hesselbarth wrote:
> >>On 08/23/13 02:59, Sören Brinkmann wrote:
> >>>On Thu, Aug 22, 2013 at 05:26:47PM -0700, Sören Brinkmann w
Hi!
On Thu, Aug 22, 2013 at 05:59:36PM -0700, Sören Brinkmann wrote:
> On Thu, Aug 22, 2013 at 05:26:47PM -0700, Sören Brinkmann wrote:
> > Hi Sebastian,
> >
> > On Tue, Aug 20, 2013 at 04:04:31AM +0200, Sebastian Hesselbarth wrote:
> > > With arch/arm calling of_clk_init(NULL) from time_init(), w
struct pfuze_chip *pfuze_chip = dev_get_drvdata(&client->dev);
> +
> + for (i = 0; i < PFUZE100_MAX_REGULATOR; i++)
> + regulator_unregister(pfuze_chip->regulators[i]);
> +
> + return 0;
> +}
On Wed, Jul 24, 2013 at 06:07:18PM +0800, Robin Gong wrote:
> On Wed, Jul 24, 2013 at 10:30:41AM +0200, Steffen Trumtrar wrote:
> > Hi!
> >
> > I tested your patch and had to change two things to actually make it
> > work. See below...
> >
> > On Sun, Jul 2
On Wed, Jul 24, 2013 at 10:42:28AM +0100, Mark Brown wrote:
> On Wed, Jul 24, 2013 at 10:30:41AM +0200, Steffen Trumtrar wrote:
> > On Sun, Jul 21, 2013 at 05:17:27PM +0800, Robin Gong wrote:
>
> >
> > static struct regulator_ops pfuze100_fixed_regulator_ops =
Hi!
I tested your patch and had to change two things to actually make it
work. See below...
On Sun, Jul 21, 2013 at 05:17:27PM +0800, Robin Gong wrote:
> Add pfuze100 regulator driver.
>
> Signed-off-by: Robin Gong
(...)
> ---
> diff --git a/drivers/regulator/pfuze100-regulator.c
> b/driver
On Wed, Jul 17, 2013 at 10:10:15AM -0700, Sören Brinkmann wrote:
> zynq_slcr_cpu_start/stop() ignored the current register state when
> writing to a register. Fixing this by implementing proper
> read-modify-write.
>
> Signed-off-by: Soren Brinkmann
> ---
> arch/arm/mach-zynq/slcr.c | 16 +++
this is supported upstream. Is anybody working on that?
> >Where would such a driver fit?
>
> Adding Steffen Trumtrar, as I came across his patch:
> http://permalink.gmane.org/gmane.linux.drivers.devicetree/31370
>
> @Steffen, was there no answer to your questions about t
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